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Chapter 6

XST VHDL Language Support

This chapter (XST VHDL Language Support) explains how XST supports the VHDL hardware description language, and provides details on VHDL, supported constructs, and synthesis options. This chapter includes:

•“About XST VHDL Language Support”

•“VHDL IEEE Support”

•“XST VHDL File Type Support”

•“Debugging Using Write Operation in VHDL”

•“VHDL Data Types”

•“VHDL Record Types”

•“VHDL Initial Values”

•“VHDL Objects”

•“VHDL Operators”

•“Entity and Architecture Descriptions in VHDL”

•“VHDL Combinatorial Circuits”

•“VHDL Sequential Circuits”

•“VHDL Functions and Procedures”

•“VHDL Assert Statements”

•“Using Packages to Define VHDL Models”

•“VHDL Constructs Supported in XST”

•“VHDL Reserved Words”

For more information, see the following:

•For a complete specification of VHDL, see the IEEE VHDL Language Reference Manual.

•For a description of supported design constraints, see “XST Design Constraints.”

•For a description of VHDL attribute syntax, see “VHDL Attribute Syntax.”

About XST VHDL Language Support

VHDL offers a broad set of constructs for compactly describing complicated logic:

•VHDL allows the description of the structure of a system — how it is decomposed into subsystems, and how those subsystems are interconnected.

•VHDL allows the specification of the function of a system using familiar programming language forms.

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