Synthesizing VHDL Designs Using Command Line Mode

Setting Up an XST Script Using the Elaborate Command

Use the Elaborate command to pre-compile VHDL and Verilog files in a specific library, or to verify Verilog files without synthesizing the design. Since compilation is included in the run, the Elaborate command is optional.

The Elaborate command accepts the options shown in Table 12-2, “Elaborate Command Options.” For more information about these options, see “XST Design Constraints.”

Table 12-2: Elaborate Command Options

Synthesizing VHDL Designs Using Command Line Mode

This section discusses Synthesizing VHDL Designs Using command line mode, and includes:

•“Synthesizing VHDL Designs Using Command Line Mode (Example)”

•“Running XST in Script Mode (VHDL)”

Synthesizing VHDL Designs Using Command Line Mode (Example)

This example shows how to synthesize a hierarchical VHDL design for a Virtex™ FPGA device using command line mode.

The example uses a VHDL design, called watchvhd. The files for watchvhd can be found in the ISEexamples\watchvhd directory of the ISE™ installation directory.

This design contains seven entities:

•stopwatch

•statmach

•tenths (a CORE Generator™ core)

•decode

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•smallcntr

•cnt60

•hex2led

Following is an example of how to synthesize a VHDL design using command line mode.

1.Create a new directory, named vhdl_m.

2.Copy the following files from the ISEexamples\watchvhd directory of the ISE installation directory to the newly created vhdl_m directory.

♦stopwatch.vhd

♦statmach.vhd

♦decode.vhd

♦cnt60.vhd

♦smallcntr.vhd

♦tenths.vhd

♦hex2led.vhd

To synthesize the design, which is now represented by seven VHDL files, create a project.

XST supports mixed VHDL and Verilog projects. Xilinx recommends that you use the new project format, whether or not it is a real mixed language project. In this example we use the new project format. To create a project file containing only VHDL files, place a list of VHDL files preceded by keyword VHDL in a separate file. The order of the files is not important. XST can recognize the hierarchy, and compile VHDL files in the correct order.

For the example, perform the following steps:

1.Open a new file, called watchvhd.prj

2.Enter the names of the VHDL files in any order into this file and save the file: vhdl work statmach.vhd

vhdl work decode.vhd vhdl work stopwatch.vhd vhdl work cnt60.vhd vhdl work smallcntr.vhd vhdl work tenths.vhd vhdl work hex2led.vhd

3.To synthesize the design, execute the following command from the XST shell or the script file:

run -ifn watchvhd.prj -ifmt mixed -top stopwatch -ofn watchvhd.ngc - ofmt NGC

-p xcv50-bg256-6 -opt_mode Speed -opt_level 1

You must specify a top-level design block with the -top command line option.

To synthesize just hex2led and check its performance independently of the other blocks, you can specify the top-level entity to synthesize on the command line, using the -top option. For more information, see Table 5-1, “XST-Specific Non-Timing Options.”

run -ifn watchvhd.prj -ifmt mixed -ofn watchvhd.ngc -ofmt NGC -p xcv50-bg256-6 -opt_mode Speed -opt_level 1 -top hex2led

During VHDL compilation, XST uses the library work as the default. If some VHDL files are to be compiled to different libraries, add the library name before the file name. For example, to compile hexl2led into the library my_lib, write the project file as follows:

vhdl work statmach.vhd vhdl work decode.vhd vhdl work stopwatch.vhd vhdl work cnt60.vhd vhdl work smallcntr.vhd vhdl work tenths.vhd vhdl my_lib hex2led.vhd

If XST does not recognize the order, it issues the following warning:

WARNING:XST:3204. The sort of the vhdl files failed, they will be compiled in the order of the project file.

In this case, you must:

•Put all VHDL files in the correct order.

•Add the -hdl_compilation_order option with value user to the XST run command:

run -ifn watchvhd.prj -ifmt mixed -top stopwatch -ofn watchvhd.ngc -ofmt NGC -p xcv50-bg256-6 -opt_mode Speed -opt_level 1 -top hex2led -hdl_compilation_order user

Running XST in Script Mode (VHDL)

It can be tedious to enter XST commands directly in the XST shell, especially when you have to specify several options and execute the same command several times. You can run XST in a script mode as follows:

1.Open a new file named stopwatch.xst in the current directory. Put the previously executed XST shell command into this file and save it.

run -ifn watchvhd.prj -ifmt mixed -top stopwatch -ofn watchvhd.ngc

-ofmt NGC -p xcv50-bg256-6 -opt_mode Speed -opt_level 1

2.From the tcsh or other shell, enter the following command to begin synthesis. xst -ifn stopwatch.xst

During this run, XST creates the following files.

♦watchvhd.ngc: an NGC file ready for the implementation tools

♦xst.srp: the xst log file

3.To save XST messages in a different log file (for example, watchvhd.log), run the following command:

xst -ifn stopwatch.xst -ofn watchvhd.log

To improve the readability of the stopwatch.xst file, especially if you use many options to run synthesis, place each option with its value on a separate line. Observe these rules:

•The first line contains only the run command without any options.

•There are no blank lines in the middle of the command.

•Each line (except the first one) begins with a dash (–).

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