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Chapter 5: XST Design Constraints

R

MAX_DELAY

Identifies all paths defined by the following timing constraints:

ALLCLOCKNETS

OFFSET_IN_BEFORE

OFFSET_OUT_AFTER

INPAD_TO_OUTPAD

 

Offset_in_Before

 

 

AllClockNets/Period

 

Offset_out_After

 

 

Logic

 

 

Logic

 

 

 

IPAD

Circuitry

D

Q

Circuitry

D

Q

OPAD

 

 

CLK

 

 

CLK

 

 

IPAD

 

 

 

 

 

 

 

 

 

 

 

 

 

Logic

 

 

 

Inpad_to_Outpad

 

Circuitry

OPAD

 

 

 

 

 

IPAD

X8991

XCF Timing Constraint Support

If you specify timing constraints in the XST Constraint File (XCF), Xilinx recommends that you use a forward slash (/) as a hierarchy separator instead of an underscore (_). For more information, see “Hierarchy Separator (–hierarchy_separator)”

If all or part of a specified timing constraint is not supported by XST, XST issues a warning, and ignores the unsupported timing constraint (or unsupported part of it) in the Timing Optimization step. If the Write Timing Constraints option is set to yes, XST propagates the entire constraint to the final netlist, even if it was ignored at the Timing Optimization step.

The following timing constraints are supported in the XCF:

“Period (PERIOD)”

“Offset (OFFSET)”

“From-To (FROM-TO)”

“Timing Name (TNM)”

“Timing Name on a Net (TNM_NET)”

“Timegroup (TIMEGRP)”

“Timing Ignore (TIG)”

Period (PERIOD)

Period (PERIOD) is a basic timing constraint and synthesis constraint. A clock period specification checks timing between all synchronous elements within the clock domain as defined in the destination element group. The group may contain paths that pass between

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XST User Guide

 

 

10.1

R

XCF Timing Constraint Support

clock domains if the clocks are defined as a function of one or the other. For more information, see “PERIOD” in the Xilinx Constraints Guide.

Period XCF Syntax Example

NET netname PERIOD = value [{HIGH|LOW} value];

Offset (OFFSET)

Offset (OFFSET) is a basic timing constraint. It specifies the timing relationship between an external clock and its associated data-in or data-out pin. OFFSET is used only for padrelated signals, and cannot be used to extend the arrival time specification method to the internal signals in a design.

OFFSET allows you to:

Calculate whether a setup time is being violated at a flip-flop whose data and clock inputs are derived from external nets

Specify the delay of an external output net derived from the Q output of an internal flip-flop being clocked from an external device pin

For more information, see “OFFSET” in the Xilinx Constraints Guide.

Offset XCF Syntax Example

OFFSET = {IN|OUT} offset_time [units] {BEFORE|AFTER} clk_name [TIMEGRP group_name];

From-To (FROM-TO)

From-To (FROM-TO) defines a timing constraint between two groups. A group can be user-defined or predefined (FFS, PADS, RAMS). For more information, see “FROM-TO” in the Xilinx Constraints Guide.

From-To XCF Syntax Example

TIMESPEC TSname = FROM group1 TO group2 value;

Timing Name (TNM)

Timing Name (TNM) is a basic grouping constraint. Use TNM to identify the elements that make up a group which you can then use in a timing specification. TNM tags specific FFS, RAMs, LATCHES, PADS, BRAMS_PORTA, BRAMS_PORTB, CPUS, HSIOS, and MULTS as members of a group to simplify the application of timing specifications to the group.

The RISING and FALLING keywords may also be used with TNMs. For more information, see “TNM” in the Xilinx Constraints Guide.

Timing Name XCF Syntax Example

{INST|NET|PIN} inst_net_or_pin_name TNM = [predefined_group:] identifier;

Timing Name on a Net (TNM_NET)

Timing Name on a Net (TNM_NET) is essentially equivalent to TNM on a net except for input pad nets. Special rules apply when using TNM_NET with the PERIOD constraint for Virtex, Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4 or Spartan-3 LL/DCMs. For more

XST User Guide

www.xilinx.com

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10.1

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