FIGURE 12.4

The diode bridge PSR when diodes c and d are conducting, and a and b are blocking current flow.

carrier frequency of the BDBPSR is determined by the types of diodes used. Schottky diodes switch extremely fast because they are majority carrier devices and there is no minority carrier storage at the junction; they will give satisfactory results in the hundreds of megahertz (Yang, 1988).

12.3 Phase Detectors

12.3.1Introduction

A phase detector (PD) operates on two periodic signals of the same frequency and returns a dc signal voltage proportional to the phase difference between the two signals. PDs have several important applications. They are used in lock-in amplifiers to ensure the reference signal retains the correct phase relation with the input carrier for optimum demodulation (McDonald and Northrop, 1993). They are also used as an essential component in all phaselock loops, which have many applications. Sections 12.4.5 and 12.8.3 will show that a PD is necessary in a phase-locked laser radar (LAVERA) system. PDs are also used in the impedance and autobalancing bridges used to measure body impedance or admittance. PDs can be subdivided into analog and digital designs.

12.3.2The Analog Multiplier Phase Detector

The simplest analog phase detector (PD) is the analog multiplier followed by a low-pass filter, as shown in Figure 12.5. The input sinusoid with the phase to be measured is

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Vs sin(ωc t + θ)

FIGURE 12.5

Block diagram of an analog multiplier phase detector.

The reference sinusoid is the quadrature signal,

and the output of the analog multiplier is:

By trigonometric identity:

The LPF attenuates the 2ωc frequency term; its output simply estimates

where θe ∫ (θ − φ) is in radians.

A systems approximation for the analog multiplier PD is shown in Figure 12.6. Note that for small phase error, the PD is linear, but exhibits periodic nonlinear behavior. Because the two coherent signals must be 90∞ out of phase for the AM PD to work, it is called a quadrature PD.

As in the case of the switched op amp PSR, it is possible to have a switched op amp or transistor PD in which the input analog signal, vs(t), given by Equation 12.8 is effectively multiplied by a ±1 reference quadrature square wave given by sgn{Vr cos(ωc t)}. To demonstrate that the switched PD gives the same result as the analog multiplier PD, recall that a unity square wave

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z(t)

vs(t) = Vs sin(ωct + θ)

FIGURE 12.6

(A) Analog multiplier quadrature phase detector without LPF. (B) Sin(θ − φ) approximation to analog multiplier quadrature phase detector. (C) When Ωθ−φΩ < 15∞, then z (θ − φ).

can be expressed by its Fourier series. The Fourier series for a periodic time function, f(t), can be written as the infinite harmonic sum (Northrop, 2003):

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To show that the product, z(t) = Vs sin(ωo t + θe) sgn{Vr cos(ωo t)}, when averaged, gives phase detection, use the fundamental frequency (n = 1) term in the F-series for the cosine square wave, sgn{Vr cos(ωo t)}. The higher-order harmonics in the F-series lead to output frequencies that are multiples of ωo and therefore filtered out. Note also for sgn{Vr cos(ωot)} that a0 = 0 and bn = 0 because f(t) is an even function. Thus, f(t) is approximated by:

Thus,

z(t) = (4Vs π)sin(ωot + θe )cos(ωot) = (2Vs π)[sin(2ωot + θe )+ sin(θe )] (12.19)

After low-pass filtering, the desired output is:

The latter term in Equation 12.20 is valid for the phase difference between input and output waves, θe < 15∞. Note that this PD has the same sin(θ) nonlinearity as the pure analog multiplier PD. This type of phase detector is used in many IC phase-lock loop designs.

12.3.3Digital Phase Detectors

Analog phase detectors based on ideal multiplication require a quadrature reference signal and a low-pass filter, and produce a nonlinear output given by sin(θe). Digital phase detectors, on the other hand, accept two logic signal inputs and generally give a low-pass filtered output that is linear over some range of θe but periodic in θe.

The first digital phase detector to be examined is the exclusive NOR PD, illustrated with waveforms in Figure 12.7. This PD accepts two TTL square waves with 50% duty cycles, which have the same frequency but differ in phase by an amount, θe. The op amp has two functions: (1) it subtracts approximately 1.7 V from the Q waveform, so when Q has a 50% duty cycle, the average output, Vz(t) = 0; (2) it low-pass filters the offset Q signal and outputs its average value. Note that Vz(t) = 0 when θe = ±kπ/2, k odd. Like the analog multiplier PD, the ENOR PD is also a quadrature PD. Note that the average output is linear with θe over a range of 0 to π radians, but is also periodic in θe with period 2π. The frequency of the Q output is 2/T pps.

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P

3.4 V

S

Q

P

3.4 V

S

Q

FIGURE 12.7

An exclusive NOR digital phase detector and examples of its waveforms. The bottom graph shows a plot of the (offset) average output voltage of this PD vs. the phase difference between TTL inputs P and S. Note the zeros are at odd integer multiples of (π/2).

Another linear digital PD can be realized with a simple RS flip-flop (RSFF), as shown in Figure 12.8. Note that the RSFF PD uses the same DC offset and LPF op amp circuit as the ENOR PD. Inputs to the RSFF PD are required to be narrow complementary pulses, such as those that can be generated by the rising edges of the two TTL square waves triggering one-shot multivibrators’

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Q

__

Vz

FIGURE 12.8

The RS flip-flop PD and its waveforms. The bottom graph shows a plot of the (offset) average output voltage of this PD vs. the phase difference between TTL inputs P and S. Note the significant zeros are at odd integer multiples of π.

(one-shots) complementary outputs. Note that the Vz(t)vs θe characteristic is also periodic with period 2π, but the linear range extends the full 0 ≤ θe ≤ 2π range. This PD’s characteristic has no negative slope portion. The Vz (θe) curve has its zero at θe = π, so it is not a quadrature system. The reference square wave needs only logical inversion before triggering the one-shot.

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R U

RSFF

RSFF

V D

FIGURE 12.9

A combinational/sequential logic PD based on the Motorola MC4044 digital PD IC.

More complex linear digital phase detectors have been devised. One venerable design based on the Motorola MC4044 IC is shown in Figure 12.9. This PD’s architecture is made up from various NAND gates. Note the two RS flip-flops in the center of the left-hand column. Figure 12.10 illustrates the input and output waveforms at nodes R, V, U, and D, respectively. The digital waveforms for V lagging R (top set) and for V leading R (middle set) are shown. Subtracting U from D by a simple op amp DA and low-pass filtering the difference to recover the average output, Vz , yields a linear output voltage, vs θe, over a full ±2π interval, as shown in Figure 12.11.

Another logic chip-based digital PD is shown in Figure 12.12. This circuit uses a 7495 (or Fairchild 9300) four-bit, bidirectional shift register (Northrop, 1990). As a PD in a PLL, it can detect lock (ωp = ωr) by Q0 = LO, Q2 = HI, and Q1 has the TTL phase signal similar to the RSFF output. If ωp > ωr, then Q0 = LO, Q1 = LO, and Q2 has a duty cycle proportional to (ωp − ωr). If ωp < ωr, then Q1 = HI, Q2 = HI, and Q0 has a duty cycle proportional to (ωr − ωp). Note that this phase-frequency detector’s phase difference output on Q1 is not periodic in θe, like other digital PDs; it saturates LO for ωp > ωr and saturates HI when ωp < ωr. Q1 has a 50% duty cycle when ωp = ωr radians, giving Vz (θe) = 0. Note that the P and R inputs must be narrow complementary pulses derived from the`Q outputs of one-shots.

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R

V θe

U

D

R

θe

V

U

D

FIGURE 12.10

Top: example of the 4044 PD’s waveforms for V lagging R. Middle: example of the 4044 PD’s waveforms for V leading R. Bottom: op amp DA and low-pass filter used to condition the 4044 PD’s outputs, U and D.

Because of their linearity, digital PhDs are useful in instrumentation schemes in which phase must be measured. Note that it is possible to run two noise-free sinusoidal signals through comparators with hysteresis to generate two digital signals that can be measured with a simple digital PD.

A microcomputer-based, frequency-independent digital phase meter with one-millidegree resolution was designed and tested by Du (1993) in the

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FIGURE 12.11

Average output voltage vs. input phase difference for the 4044 PD with the op amp signal conditioner. Note each linear segment spans a full ±2 π radians, and has zero output for zero phase difference between R and V.

P

FIGURE 12.12

A shift register-based digital phase-frequency detector.

author’s laboratory. The reference digital input channel was also the input to a Signetics NE564 phase-lock loop that used a divide-by 360,000 counter between its VCO and its phase detector. Thus, the VCO TTL output was phase locked to the input R signal and its output frequency was 360,000 times the input frequency, fo.

The high level of the QR comparator output is NANDed with the QS output of the signal comparator. Any phase shift between VR and VS produces a narrow complementary gating pulse at the output of the NAND gate that allows the PLL output at 360,000 fo to be counted. The count occurs once per cycle for a preset number of cycles. The total count is stored in the shift registers (74F299) and then downloaded into the PC for averaging. Each count is the phase lag between VR and VS in millidegrees and is independent of the frequency of the inputs.

Du’s phase meter worked with input frequencies, fo, of up to 100 Hz and gave a numerical output of θe and its statistics. Figure 12.13 and Figure 12.14 illustrate the architecture of the millidegree phase meter and the PLL used

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__

MR

Shift registers

FIGURE 12.13

Architecture of the millidegree phase detector devised by Du (1993). The system is based on a phase-lock loop with a clock that runs 360,000 times faster than the input frequency.

Co = 18 pF

150 pF 150 pF

360 000 fo

FIGURE 12.14

Detailed block diagram of Du’s PLL.

as a ∞360,000 frequency multiplier. Du’s system was used in dielectric materials measurements where it was desired to measure minute phase shifts caused by dielectric losses at power line frequencies.

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