A.3 BNF Index

Table A.1 is an index to the VHDL BNF productions. For example, to find the legal positions for a process statement you would locate production rules 21 and 32 opposite process_statement in Table A.1 . These rule numbers correspond to the productions for concurrent_statement ( 21 ) and entity_declaration ( 32 ). Next, turning to rule 32 for entity_declaration , you will find that only a passive _process_statement is allowed in an entity declaration. Table A.2 is a list of VHDL keywords and an index to rules that reference a keyword.

TABLE A.2 VHDL keywords and index (list of rules that reference a keyword). 1

A.4 Bibliography

The book by Ashenden [1995] covers VHDL-93 in detail. Other books on VHDL include: Coelho [1989]; Lipsett, Schaefer, and Ussery [1989]; Armstrong [1989]; Augustin et al. [1991]; Perry [1991]; Mazor and Langstraat [1992]; three books by Bhasker [ 1992, 1995, 1996]; Armstrong and Gray [1993]; Baker [1993]; Navabi [1993]; Ott and Wilderotter [1994]; Airiau, Bergé, and Olive [1994]; two books by Cohen [ 1995, 1997]; Pick [1996]; Jerraya et al. [1997]; Pellerin and Taylor [1997]; Sjoholm and Lindh [1997]; and Chang [1997]. Of these, the book by Armstrong and Gray and Perry s books (two editions) are easy-to-read introductions. The following books describe example VHDL models for ASICs: Leung and Shanblatt [1989], Skahill [1996], Smith [1996]. Edited books by Bergé et al. [ 1992, 1993]; Harr and Stanculescu [1991]; Mermet [1992]; and Schoen et al. [1991] contain papers on more advanced aspects of VHDL.

There are some issues and interpretations of VHDL that are covered in a separate IEEE document [IEEE 1076-1991]; also relevant are the IEEE standard logic system for VHDL [IEEE 1164-1993], the WAVES standard [IEEE 1029.1-1991], and the VITAL standard [IEEE 1076.4-1995]. The IEEE has produced a VHDL interactive tutorial on CD-ROM [IEEE 1164-1997]. Hanna et al. [1997] cover the IEEE WAVES standard.

Updates and extensions to VHDL are controlled by the IEEE working groups (WG). These include study and WGs on: Object Oriented VHDL, Open Modeling Forum, Simulation Control Language ( SimCL), System Design & Description Language, VHDL Analog Extensions ( PAR 1076.1), VHDL Math Package ( PAR 1076.2), VHDL Synthesis Package ( PAR 1076.3), Utility ( PAR 1076.5), VHDL Shared Variables (PAR 1076; mod a), VHDL Analysis and Standards Group ( VASG ) Issues Screening and Analysis Committee (ISAC), VHDL Library, VHDL Parallel Simulation, and VHDL Test. Links to the activities of these groups, as well as an explanation of a Project Authorization Request (PAR) and the standards process, may be found at http://ieee.org and http://stdsbbs.ieee.org .

A.5 References

Page numbers in brackets after a reference indicate its location in the chapter body.

The current IEEE standards and material listed here are published by The Institute of Electrical and Electronics Engineers, Inc., 345 East 47th Street, New York, NY 10017 USA. Inside the United States, IEEE standards may be ordered at 1-800-678-4333. See also http://ieee.org and http://stdsbbs.ieee.org .

Airiau, R., J.-M. Bergé, and V. Olive. 1994. Circuit Synthesis with VHDL. Boston: Kluwer, 221 p. ISBN 0792394291. TK7885.7.A37. Introduction to VHDL aimed at ASIC designers.

Armstrong, J. R. 1989. Chip-Level Modeling with VHDL. Englewood Cliffs, NJ: Prentice-Hall, 148 p. ISBN 0131331906. TK7874.A75 1989.

Armstrong, J. R., and F. G. Gray. 1993. Structured Logic Design with VHDL. Englewood Cliffs, NJ: Prentice-Hall, 482 p. ISBN 0138552061. TK7885.7.A76. 20 pages of references.

Ashenden, P. J. 1995. The Designer's Guide to VHDL. San Francisco: Morgan Kaufmann, 688 p. ISBN 1-55860-270-4. TK7888.3.A863. A complete reference to VHDL from a system design perspective.

Augustin, L. M., et al. 1991. Hardware Design and Simulation in VAL/VHDL. Boston: Kluwer, 322 p. ISBN 0792390873. TK7885.7.H38. Two pages of references.

Baker, L. 1993. VHDL Programming with Advanced Topics. New York: Wiley, 365 p. ISBN 0471574643. TK7885.7.B35. Basic to intermediate level coverage of VHDL.

Bergé, J.-M., et al. (Eds.). 1992. VHDL Designer's Reference. Boston: Kluwer, 455 p. ISBN 0792317564. TK7885.7.V47. Two pages of references.

Bergé, J.-M., et al. (Eds.). 1993. VHDL '92. Boston: Kluwer, 214 p. ISBN 0792393562. TK7885.7.V46. Covers new constructs in VHDL-93.

Bhasker, J. 1992. A VHDL Primer. Englewood Cliffs, NJ: Prentice-Hall, 253 p. ISBN 013952987X. TK7885.7.B53. See also the revised edition, ISBN 0131814478, 1995. A basic introduction to VHDL.

Bhasker, J. 1995. A Guide to VHDL Syntax: Based on the New IEEE Std

1076-1993. Englewood Cliffs, NJ: Prentice-Hall, 268 p. ISBN 0133243516. TK7885.7.B52. Uses graphics to illustrate BNF syntax.

Bhasker, J. 1996. A VHDL Synthesis Primer. Allentown, PA: Star Galaxy, 238 p. ISBN 0965039102. TK7885.7.B534.

Chang, K. C. 1997. Digital Design and Modeling with VHDL and Synthesis. Los Alamitos, CA: IEEE Computer Society Press. ISBN 0818677163. TK7874.7.C47.

Coelho, D. R. 1989. The VHDL Handbook. Boston: Kluwer, 389 p. ISBN 0792390318. TK7874.C6. A description of VHDL models, including details of models for simple combinational and sequential logic devices and memory. Two pages of references.

Cohen, B. 1995. VHDL Coding Styles and Methodologies. Boston: Kluwer, 365 p. ISBN 0792395980. TK7885.7.C65.

Cohen, B. 1997. VHDL Answers to Frequently Asked Questions. Boston: Kluwer, 291 p. ISBN 0792397916. TK7885.7.C64.

Hanna, J. P., et al. 1997. Using WAVES and VHDL for Effective Design and Testing. Boston: Kluwer, 304 p. ISBN 0792397991. TK7874.7.U87.

Harr, R. E., and A. G. Stanculescu (Eds.). 1991. Applications of VHDL to Circuit Design. Boston: Kluwer, 232 p ISBN 0792391535. TK7867.A64.

IEEE 1076-1987. IEEE Standard VHDL Language Reference Manual. This version of the VHDL LRM is replaced by VHDL-93; however, some systems (and some IEEE Standards, notably VITAL) are based on VHDL-87. For instructions on how to obtain obsolete IEEE standards (known as archive standards), see http://stdsbbs.ieee.org . [ reference location ]

IEEE 1076-1991. 1076 Interpretations, 1991 IEEE Standards Interpretations: IEEE Std 1076-1987, IEEE Standard VHDL Language Reference Manual. 208 p. ISBN 1-55937-181-1. TK7885.7.I58. IEEE Ref. SH14894-NYF.

IEEE 1029.1-1991. IEEE Standard for Waveform and Vector Exchange (WAVES) (ANSI). 96 p. ISBN 1-55937-195-1. IEEE Ref. SH15032-NYF.

IEEE 1164-1993. IEEE Standard Multivalue Logic System for VHDL Model Interoperability (Std_logic_1164). 24 p. ISBN 1-55937-299-0. IEEE Ref. SH16097-NYF.

IEEE 1076-1993. IEEE Standard VHDL Language Reference Manual (ANSI). 288 p. ISBN 1-55937-376-8. IEEE Ref. SH16840-NYF. [ reference location ]

IEEE 1076.4-1995. IEEE Standard VITAL Application-Specific Integrated Circuit (ASIC) Modeling Specification. 96 p. ISBN 1-55937-691-0. IEEE Ref. SH94382-NYF. Includes an MS-DOS diskette containing the ASCII code for the VITAL_Timing and VITAL_Primitives packages.

IEEE 1076-1997. VHDL Interactive Tutorial. This CD-ROM tutorial is available from IEEE by itself or with a printed version of the VHDL LRM. The CD-ROM is available in the following formats: IBM Windows (Windows 3.1 and Windows 95), Macintosh, Sun OS, and Sun Solaris.

Jerraya, A. A., et al. 1997. Behavioral Synthesis and Component Reuse with VHDL. Boston: Kluwer, 263 p. ISBN 0792398270. TK7874.75.B45. Eight pages of references.

Leung, S. S., and M. A. Shanblatt. 1989. ASIC System Design with VHDL: A Paradigm. Boston: Kluwer, 206 p. ISBN 0-7923-90932-6. TK7874.L396. Describes VHDL models for an ASIC intended for IKS (inverse kinematic solution) which converts cartesian space to the robot-joint space. Eight pages of references.

Lipsett, R., C. Schaefer, and C. Ussery. 1989. VHDL: Hardware Description and Design. Boston: Kluwer, 299 p. ISBN 079239030X. TK7887.5.L57. Intermediate guide to VHDL.

Mazor, S., and P. Langstraat. 1992. A Guide to VHDL. Boston: Kluwer. ISBN 0792392558. TK7885.7.M39. See also 2nd ed., ISBN 0792393872, 1993. Basic introduction to VHDL.

Mermet, J. (Ed.). 1992. VHDL for Simulation, Synthesis, and Formal Proofs of Hardware. Boston: Kluwer. ISBN 0792392531. TK7885.7.V48.

Navabi, Z. 1993. VHDL: Analysis and Modeling of Digital Systems. New York: McGraw-Hill, 375 p. ISBN 0070464723. TK7874.N36. Introduction to VHDL.

Ott, D. E., and T. J. Wilderotter. 1994. A Designer's Guide to VHDL Synthesis. Boston: Kluwer. ISBN 0792394720. TK7885.7.O89.

Pellerin, D., and D. Taylor. 1997. VHDL Made Easy! Upper Saddle River, NJ: Prentice-Hall, 419 p. ISBN 0136507638. TK7885.7.P46.

Perry, D. L. 1991. VHDL. New York: McGraw-Hill, 458 p. ISBN 0070494339. TK7885.7.P47. See also 2nd ed., ISBN 0070494347, 1994. Good introduction to VHDL.

Pick, J. 1996. VHDL Techniques, Experiments, and Caveats. New York: McGraw-Hill, 382 p. ISBN 0070499063. TK7885.7.P53. A series of intermediate to advanced examples that illustrate mistakes in VHDL.

Schoen, J. M., et al. (Eds.). 1991. Performance and Fault Modeling with VHDL. Englewood Cliffs, NJ: Prentice-Hall, 406 p ISBN 0136588166. TK7888.4.P47.

Sjoholm, S., and L. Lindh. 1997. VHDL for Designers. Englewood Cliffs, NJ: Prentice-Hall. ISBN 0134734149. TK7885.7.S54.

Skahill, K. 1996. VHDL for Programmable Logic. Menlo Park, CA: Addison-Wesley, 593 p. ISBN 0-201-89573-0. TK7885.7.S55. Covers VHDL

design for PLDs using Cypress Warp.

Smith, D. J. 1996. HDL Chip Design: A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog. Madison, AL: Doone Publications, 448 p. ISBN 0965193438. TK7874.6.S62.

Last Edited by SP 14112004

VERILOG HDL

RESOURCES

The definitive reference for the Verilog HDL is IEEE Std 1364-1995. This standard is known as the IEEE Verilog® HDL language reference manual ( LRM ) and the 1995 version is referred to here as the 95 LRM [IEEE 1364-1995]. 1

Verilog is a registered trademark of Cadence Design Systems and Verilog-XL is a commercial simulator.

1. IEEE Std 1364-1995, Copyright © 1995. IEEE. All rights reserved. The Verilog HDL syntax section in this appendix is reprinted from the IEEE copyright material with permission.

B.1 Explanation of the Verilog

HDL BNF

Annex A of the Verilog HDL LRM describes syntax using the BNF (BackusNaur form). The Verilog HDL BNF is slightly different from that employed in the VHDL LRM (see Appendix A, Section A.1, BNF ). The BNF syntax in the Verilog LRM is normative , which means that the syntax is part of the definition of the language (and the complete BNF description is contained in an annex ). The BNF syntax in the VHDL LRM is informative , which means the BNF is not part of the standard defining the language (and the complete BNF description is contained in an appendix ). The following items summarize the Verilog HDL BNF syntax:

●name (in lowercase) is a syntax construct item ( term , or syntactic category ) defined by other syntax construct token items ( items , parts , or tokens ) or by lexical token items.

●NAME (in uppercase) is a lexical token item , the leaves in a tree of definitions.

●[ name ] is an optional item .

●{ name } is one or more items.

●The symbol ::= gives a syntax definition ( definition , rule , construct , or production ) for an item (i.e., the symbol ::= means is equivalent to ).

●| introduces an alternative syntax definition (i.e., the symbol | means or ).

●Braces and brackets, { } and [ ] , that are required by the syntax are set in bold, { } [ ] , in the 95 LRM, despite the fact they are difficult to distinguish from the plain versions.

● The vertical bar, | , that represents an alternative definition is set in bold, | , in the 95 LRM, despite being difficult to distinguish from the plain version.

●All other characters that are set in bold (as they are in Annex A of the 95 LRM) are literals required by the syntax (for example, a plus sign '+' ).

●Italic prefixes, for example, msb _constant_expression , are comments.

●Keywords are printed in bold , as they are in Annex A of the 95 LRM.

●Definitions here are in alphabetical order (Annex A of the 95 LRM groups definitions by function). The highest-level definition is source_text ; this is where you start. The lowest-level items are in uppercase; these are where you end.

●The BNF is reproduced exactly as it appears in Annex A of the 95 LRM. Footnotes explain a number of typographical issues.

●References in brackets immediately following the ::= symbol form backward-pointing links to the constructs that reference a particular item. Thus, for example, always_construct ::= [94] indicates that construct number 94 ( module_item ) references the item always_construct (see also Table B.1 , which collects all these links together, and Table B.2 , which is a keyword index).

●References in brackets following the construct links refer to the 95 LRM. Thus, for example, always_construct ::= [94] [95LRM 9.9.2] , indicates that section 9.9.2 of the 95 LRM contains the definition for always_construct .