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Coprocessor Interface

11.3Token queue management

The token queues, all of which are three slots long and function identically, are implemented as short FIFOs. The following sections describe an example implementation of the queues:

Queue implementation

Queue modification

Queue flushing on page 11-11.

11.3.1Queue implementation

The queue FIFOs are implemented as three registers, with the current output selected by using multiplexors. Figure 11-4 shows this arrangement.

 

V

Output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Interconnect

 

 

 

S0

 

 

 

S1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

Buffer A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

Buffer B

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

0

 

Out

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

Buffer C

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 11-4 Token queue buffers

The queue consists of three registers. Each of these is associated with a flag that indicates if the register contains valid data. New data are moved into the queue by being written into buffer A and continue to move along the queue if the next register is empty, or is about to become empty. If the queue is full, the oldest data, and therefore the first to be read from the queue, occupies buffer C and the newest occupies buffer A.

The multiplexors also select the current flag, that then indicates whether the selected output is valid.

11.3.2Queue modification

The queue is written to on each cycle. Buffer A accepts the data arriving at the interface, and the buffer A flag accepts the valid bit associated with the data. If the queue is not full, this results in no loss of data because the contents of buffer A are moved to buffer B during the same cycle.

If the queue is full, then the loading of buffer A is inhibited to prevent loss of data. In any case, no valid data is presented by the interface when the queue is full, so no data loss ensues.

The state of the three buffer flags is used to decide the buffer that provides the queue output during each cycle. The output is always provided by the buffer containing the oldest data. This is buffer C if it is full, or buffer B or, if that is empty, buffer A.

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Coprocessor Interface

A simple priority encoder, looking at the three flags, can supply the correct multiplexor select signals. The state of the three flags can also determine how data are moved from one buffer to another in the queue. Table 11-4 lists how the three flags are decoded.

Table 11-4 Addressing of queue buffers

Flag C

Flag B

Flag A

S

S

Remarks

1

0

 

 

 

 

 

 

 

 

 

 

0

0

0

X

X

Queue is empty

 

 

 

 

 

 

0

0

1

0

0

B = A

 

 

 

 

 

 

0

1

0

0

1

C = B

 

 

 

 

 

 

0

1

1

0

1

C = B, B = A

 

 

 

 

 

 

1

0

0

1

X

-

 

 

 

 

 

 

1

0

1

1

X

B = A

 

 

 

 

 

 

1

1

0

1

X

-

 

 

 

 

 

 

1

1

1

1

X

Queue is full. Input inhibited

 

 

 

 

 

 

New data can be moved into buffer A, provided the queue is not full, even if its flag is set, because the current contents of buffer A are moved to buffer B. When the queue is read, the flag associated with the buffer providing the information must be cleared. This operation can be combined with an input operation so that the buffer is overwritten at the end of the cycle during which it provides the queue output. This can be implemented by using the read enable signal to mask the flag of the selected stage, making it available for input. Figure 11-5 shows reading and writing a queue.

Valid input

 

 

 

 

Buffer A

One

Two

Three

Four

Flag A

 

 

 

 

Buffer B

 

One

Two

Three

Flag B

 

 

 

 

Buffer C

 

 

One

Two

Flag C

 

 

 

 

Read queue

 

 

 

 

Output

One

One

One

Two

Figure 11-5 Queue reading and writing

Four valid inputs, labeled One, Two, Three, and Four, are written into the queue, and are clocked into buffer A as they arrive. Figure 11-5 shows how these inputs are clocked from buffer to buffer until the first input reaches buffer C. At this point a read from the queue is required. Because buffer C is full, it is chosen to supply the data. Because it is being read, it is free to accept more input, and so it receives the value Two from buffer B, that in turn receives the value Three from buffer A. Because buffer A is being emptied by writing to buffer B, it can accept the value Four from the input.

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Coprocessor Interface

11.3.3Queue flushing

When the coprocessor pipeline is flushed, in response to a command from the core, some of the queues might also require flushing. There are two possible ways of flushing the queue:

the entire queue is cleared

the queue is flushed from a selected buffer, along with all data in the queue newer than the data in the selected buffer.

The method used depends on the point when flushing begins in the coprocessor pipeline. See Flush operations on page 11-19 for more details. A flush command has associated with it a tag value that indicates where the queue flushing starts. This is matched with the tag carried by every instruction.

If the queue is to be flushed from a selected buffer, the buffer is chosen by looking for a matching tag. When this is found, the flag associated with that buffer is cleared, and every flag newer than the selected one is also cleared. Figure 11-6 shows queue flushing.

Flush

Flush

all

tag

 

 

 

 

 

 

Clear A

 

 

 

 

 

 

 

 

<=

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tag A

A

Buffer A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clear B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

<=

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tag B

B

Buffer B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clear C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

<=

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tag C

C

Buffer C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 11-6 Queue flushing

Each buffer in the queue has a tag comparator associated with it. The flush tag is presented to each comparator, to be compared with the tag belonging to each valid instruction held in the queue. The flush tag is compared with each tag in the queue. If the flush tag is the same as, or older than, any tag then that queue entry has its Full flag cleared. This indicates that it is empty. A less-than-or-equal-to comparison is used to identify tags that are to be flushed. If a tag in the pipeline later than the queue matches, the Flush all signal is asserted to clear the entire queue.

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