Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
AC_Shell / DC_Shell Equivalencies
The table below shows the dc_shell commands and their ac_shell equivalents.
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 1 of 11)
dc_shell |
ac_shell |
|
|
alias |
alias |
|
|
all_clocks |
find -ports -clocks |
|
|
all_connected |
get_info |
|
|
all_designs |
find -module * |
|
|
all_inputs |
find -ports -input |
|
|
all_inputs_not_clock |
find -ports -no_clocks |
|
|
all_outputs |
find -ports -output |
|
|
allocate_budget |
do_time_budget |
|
|
all_registers |
find -instance -registers |
|
|
analyze |
read_verilog, read_vhdl |
|
|
balance_buffer |
Not needed |
|
|
balance_registers |
No equivalent |
|
|
break |
break |
|
|
catch (Tcl command) |
catch (Tcl command) |
|
|
cd |
cd |
|
|
change_link |
do_rebind |
|
|
change_names |
do_change_names |
|
|
characterize |
do_derive_context |
|
|
check_design |
check_netlist or check_timing |
|
|
check_timing |
check_timing |
|
|
compare_design |
No equivalent |
|
|
compare_fsm |
No equivalent |
|
|
compile |
do_optimize |
|
|
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Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 2 of 11)
dc_shell |
ac_shell |
|
|
compile -incremental |
do_xform_optimize_slack |
|
|
compile_fix_multiple_port_ |
do_xform_fix_multiport_nets |
net |
set_global fix_multiport_nets |
|
|
|
|
compile -map_effort high |
do_optimize -effort high |
|
|
compile -only_design_rules |
do_xform_fix_design_rule_violations |
|
|
connect_net |
add_conn |
|
|
continue |
continue |
|
|
copy_design |
do_copy_module |
|
|
create_bus |
create_bus |
|
|
create_cell |
create_cell |
|
|
create_clock |
set_clock |
|
|
create_clock clksourcelist |
set_clock_root |
|
|
create_design |
create_module |
|
|
create_net |
create_net |
|
|
create_port |
create_port |
|
|
current_design |
set_top_timing_module |
|
set_current_module |
|
|
current_instance |
set_current_instance |
|
|
define_design_lib |
set_vhdl_library |
|
|
define_name_rules |
set_global dcn_{ bus | inst | module |
|
| net | port |} |
|
|
derive_clocks |
Tcl script |
|
|
derive_timing_constraints |
No equivalent |
|
|
disconnect_net |
delete_object |
|
|
drive_of |
get_cell_drive |
|
|
echo |
puts |
|
|
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Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 3 of 11)
dc_shell |
ac_shell |
|
|
elaborate |
do_build_generic |
|
|
exit |
exit |
|
|
extract |
Verilog source code pragmas |
|
|
filter |
get_info |
|
|
find |
find |
|
|
find (cell, name) |
find -instance |
|
|
find (lib_cell, name) |
find -cellref |
|
|
find (library, name) |
find -techlib |
|
|
find (net, name) |
find -net |
|
|
find (pin, name) |
find -pin |
|
|
find (port, name) |
find -port |
|
|
for |
for |
|
|
foreach |
foreach |
|
|
get_attribute |
get_info |
|
|
get_cells |
find -instance |
|
|
get_lib_cells |
find -cellref |
|
|
get_libs |
find -techlib |
|
|
get_nets |
find -net |
|
|
get_pins |
find -pin |
|
|
get_ports |
find -port |
|
|
get_unix_variable |
$env(name) |
|
|
group |
create_hierarchy or do_extract |
|
|
group_path |
Not needed |
|
|
group_variable |
Not needed |
|
|
help |
help |
|
|
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Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 4 of 11)
dc_shell |
ac_shell |
|
|
history |
history |
|
|
if |
if |
|
|
include |
source |
|
|
link |
do_link |
|
do_build_generic |
|
|
list |
list |
|
|
list_designs |
get_names […] |
|
|
list_instances |
get_names [find -techlib] |
|
|
list_libs |
No equivalent |
|
|
load_of |
get_cell_pin_load |
|
|
minimize_fsm |
Verilog source code pragmas |
|
|
propagate_constraints |
No equivalent |
|
|
pwd |
pwd |
|
|
quit |
quit |
|
|
read_db |
read_adb |
|
|
read_edif |
read_edif |
|
|
read -f db |
read_adb |
|
|
read -f vhdl |
read_vhdl |
|
|
read_verilog |
read_verilog |
|
do_build_generic |
|
|
read_lib |
read_alf |
|
|
read_sdf |
read_sdf |
|
|
read_timing |
read_sdf |
|
|
read_vhdl |
read_vhdl |
|
|
reduce_fsm |
Verilog source code pragmas |
|
|
regexp (Built-in Tcl command) |
regexp (Built-in Tcl command) |
|
|
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Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 5 of 11)
dc_shell |
ac_shell |
|
|
remove_attribute |
remove_assertions |
|
|
remove_bus |
delete_object [find -bus name] |
|
|
remove_cache |
Not needed |
|
|
remove_cell |
delete_object [find -cell name] |
|
|
remove_clock |
remove_assertions |
|
|
remove_constraint |
remove_assertions |
|
|
remove_design |
do_remove_design |
|
|
remove_input_delay |
remove_assertions |
|
|
remove_net |
delete_object [find -net name] |
|
|
remove_output_delay |
remove_assertions |
|
|
remove_pads |
delete_object [find -instance name] |
|
|
remove_port |
delete_object [find -port name] |
|
|
remove_unconnected_ports |
No equivalent |
|
|
remove_variable |
No equivalent |
|
|
rename_design |
do_change_name |
|
|
reoptimize_design |
do_xform_optimize_slack |
|
|
replace_synthetic |
No equivalent |
|
|
report_area |
report_area |
|
|
report_annotated_delay |
report_annotations |
|
|
report_attribute |
get_info |
|
|
report_bus |
No equivalent |
|
|
report_cache |
Not needed |
|
|
report_cell |
report_area -cell |
|
|
report_clock |
report_clocks |
|
|
report_compile_options |
No equivalent |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 6 of 11)
dc_shell |
ac_shell |
|
|
report_constraint |
report_timing or |
|
report_design_rule_violations |
|
|
report_delay_calculation |
report_cell_instance_timing |
|
|
report_design |
No equivalent |
|
|
report_fsm |
report_fsm |
|
|
report_hierarchy |
report_hierarchy |
|
|
report_lib |
report_library |
|
|
report_multicycles |
No equivalent |
|
|
report_name_rules |
get_global dcn_{ bus | inst | module |
|
| net | port |} |
|
|
report_names |
No equivalent |
|
|
report_net |
report_net |
|
|
report_path_group |
Not needed |
|
|
report_port |
report_ports |
|
|
report_reference |
report_area |
|
|
report_resource_estimates |
No equivalent |
|
|
report_resources |
No equivalent |
|
|
report_routability |
No equivalent |
|
|
report_synlib |
No equivalent |
|
|
report_timing |
report_timing |
|
|
report_timing_requirements |
No equivalent |
|
|
report_transitive_fanin |
report_fanin |
|
|
report_transitive_fanout |
report_fanout |
|
|
report_wire_load |
report_area -summary |
|
|
reset_compare_design_script |
No equivalent |
|
|
reset_design |
No equivalent |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 7 of 11)
dc_shell |
ac_shell |
|
|
reset_path |
No equivalent |
|
|
set_annotated_check |
read_sdf |
|
|
set_annotated_delay |
read_sdf |
|
|
set_attribute |
set_attribute |
|
|
set_balance_registers |
No equivalent |
|
|
set_boundary_optimization |
set_port_property (for constant propagation |
|
only) |
|
|
set_case_analysis |
set_constant_for_timing |
|
|
set_clock_latency |
set_clock_insertion_delay |
|
|
set_clock_skew |
set_clock_insertion_delay |
|
set_clock_uncertainty |
|
|
set_clock_skew -ideal | |
set_clock_propagation -ideal | |
propagated |
propagated |
|
|
set_clock_transition |
set_slew_time -clock clockname |
|
-pos | neg |
|
|
set_clock_uncertainty |
set_clock_uncertainty |
|
|
set_compare_design_script |
No equivalent |
|
|
set_critical_range |
do_optimize -critical_ratio or |
|
do_optimize -critical_offset |
|
|
set_disable_timing |
set_disable_timing or |
|
set_disable_cell_timing |
|
|
set_dont_touch instance |
set_dont_modify [find -inst |
|
instance] |
|
|
set_dont_touch module |
set_dont_modify [find -module |
|
module] |
|
|
set_dont_touch net |
set_dont_modify [ find -net net] |
|
|
set_dont_touch |
set_cell_property dont_modify true |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 8 of 11)
dc_shell |
ac_shell |
|
|
set_dont_touch_network |
set_dont_modify -network -hier |
|
|
set_dont_use |
set_cell_property dont_utilize true |
|
|
set_drive |
set_drive_resistance |
|
|
set_driving_cell |
set_drive_cell |
|
|
set_equal |
No equivalent |
|
|
set_false_path |
set_false_path |
|
|
set_fanout_load |
set_fanout_load |
|
|
set_fix_hold |
do_timing_correction -fix_hold or |
|
do_xform_fix_hold |
|
|
set_flatten |
do_optimize -flatten on |
|
|
set_fsm_encoding |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_fsm_encoding_style |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_fsm_minimize |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_fsm_order |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_fsm_preserve_state |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_fsm_state_vector |
Verilog source code pragmas, VHDL attributes |
|
and pragmas |
|
|
set_impl_priority |
No equivalent |
|
|
set_implementation |
set_global acl_default_arch |
|
|
set_input_delay |
set_input_delay |
|
|
set_input_transition |
set_slew_time |
|
|
set_load |
set_port_capacitance |
|
|
set_load -pin_load |
set_port_capacitance |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 9 of 11)
dc_shell |
ac_shell |
|
|
set_load -fanout_number |
set_num_external_sinks |
|
|
set_local_link_library |
Not needed |
|
|
set_logic_one |
set_logic1 |
|
|
set_logic_zero |
set_logic0 |
|
|
set_map_only |
No equivalent |
|
|
set_max_area |
No equivalent |
|
|
set_max_capacitance |
set_global capacitance_limit |
|
set_port_capacitance_limit |
|
|
set_max_delay |
set_path_delay -late |
|
|
set_max_fanout |
set_global fanout_load_limit |
|
set_fanout_load_limit |
|
|
set_max_time_borrow |
No equivalent |
|
|
set_max_transition |
set_global slew_time_limit |
|
set_slew_time_limit |
|
|
set_min_capacitance |
No equivalent |
|
|
set_min_delay |
set_path_delay -early |
|
|
set_min_fanout |
No equivalent |
|
|
set_min_porosity |
No equivalent |
|
|
set_min_transition |
No equivalent |
|
|
set_minimize_tree_delay |
No equivalent |
|
|
set_model_drive |
Not needed |
|
|
set_model_load |
Not needed |
|
|
set_model_map_effort |
Not needed |
|
|
set_model_scale |
Not needed |
|
|
set_multicycle_path N -setup |
set_cycle_addition N-1 -late |
|
|
set_multicycle_path N -hold |
set_cycle_addition N -early |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 10 of 11)
dc_shell |
ac_shell |
|
|
set_operating_conditions |
set_operating_conditions |
|
|
set_opposite |
No equivalent |
|
|
set_output_delay |
set_external_delay |
|
|
set_port_fanout_number |
set_num_external_sinks |
|
|
set_prefer |
Not needed |
|
|
set_propagated_clock |
set_clock_propagation propagated |
|
|
set_register_type |
Not needed |
|
|
set_resistance |
set_wire_resistance |
|
|
set_resource_allocation |
No equivalent |
|
|
set_resource_implementation |
No equivalent |
|
|
set_share_cse |
No equivalent |
|
|
set_structure no |
do_xform_propagate_constants |
|
do_xform_map -hierarchical |
|
do_optimize |
|
|
set_timing_ranges |
Not needed |
|
|
set_true_delay_case_analysis |
No equivalent |
|
|
set_unconnected |
set_unconnected |
|
|
set_ungroup |
do_dissolve_hierarchy |
|
|
set_unix_variable |
No equivalent |
|
|
set_wire_load |
set_wire_load |
|
|
set_wire_load_mode |
set_wire_load_mode |
|
|
set_wire_load_model |
set_wire_load wireload |
|
|
set_wire_load -port_list |
set_port_wire_load |
|
|
set_wire_load_selection_ |
set_wire_load_selection_table |
group |
|
|
|
simplify_constants |
do_xform_propagate_constants |
|
|
September 2000 |
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Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
Table 1-1 AC_Shell and DC_Shell Command Equivalencies (Sheet 11 of 11)
dc_shell |
ac_shell |
|
|
sh |
exec |
|
|
syntax_check |
No equivalent |
|
|
target_library = |
set_global target_technology techlib |
|
|
translate |
No equivalent |
|
|
unalias |
unalias |
|
|
ungroup |
do_dissolve_hierarchy |
|
|
uniquify |
do_uniquely_instantiate |
|
|
update_lib |
read_library_update |
|
|
update_script |
Not needed |
|
|
update_timing |
Not needed |
|
|
while |
while |
|
|
write -f verilog |
write_verilog |
|
|
write -f db |
write_adb |
|
|
write_compare_design_script |
No equivalent |
|
|
write_lib |
libcompile libname.lib libname.alf |
|
(Unix command) |
|
|
write_script |
write_assertions |
|
|
write_constraints |
write_constraints |
|
|
write_timing |
write_sdf |
|
|
write -f vhdl |
write_vhdl |
|
|
September 2000 |
25 |
Product Version 4.0 |
Ambit BuildGates Synthesis User Guide
Introduction to Ambit BuildGates Synthesis
September 2000 |
26 |
Product Version 4.0 |