- •Contents
- •Preface
- •About This Manual
- •Other Information Sources
- •Syntax Conventions
- •Text Command Syntax
- •About the Graphical User Interface
- •Using Menus
- •Using Forms
- •Introduction to Ambit BuildGates Synthesis
- •Separately Licensed Software Products
- •Low Power Synthesis
- •Physically Knowledgeable Synthesis
- •Datapath Synthesis
- •AC_Shell / DC_Shell Equivalencies
- •Getting Started
- •Invoking Ambit BuildGates Synthesis
- •Exiting Ambit BuildGates Synthesis
- •Files Used in Ambit BuildGates Synthesis Software
- •Key Bindings and Mouse Operations
- •Using the GUI
- •Main Menu Functions
- •File Menu Options
- •Edit Menu Options
- •View Menu Options
- •Commands Menu Options
- •Reports Menu Options
- •Window Menu Options
- •Help Menu Options
- •The Tool Bar
- •The Browsers
- •The Module Browser
- •The Variable Browser
- •Work Area Tools
- •HDL and Tcl Editors
- •Constraints Tool
- •The Schematic Viewer
- •Distributed Processing
- •Update Mode
- •The ac_shell Console
- •The Status Bar
- •Flow Procedures
- •Typical Synthesis Flow
- •Read the Libraries
- •Read the Design Data
- •Build Generic Netlist
- •Set Constraints
- •Optimize the Design
- •Generate Reports
- •Save Final Netlist
- •Viewing the Schematic Design
- •How to Use the Schematic Viewer
- •Keyboard Shortcuts
- •Mouse Operations
- •Objects in the Schematic Database
- •Accessing Context-Sensitive Pop-Up Menus
- •Highlighting Path Between Pins
- •Viewing Bus Properties
- •The Schematic Tool Bar
- •The Module Title Bar
- •Searching for an Object
- •Grouping Instances
- •Dissolving Instances
- •Creating a Unique Module
- •Displaying Logic Cones
- •Extracting Logic Cones
- •Displaying Port Constraints
- •Printing a Schematic
- •Setting Constraints
- •Setting a Hierarchical Context
- •Units in Constraints
- •Timing Constraints
- •Timing Analysis
- •Setting up Timing Context
- •Clock Insertion Delay Time
- •Data Arrival Time
- •External Delay
- •Multicycle Paths
- •Setting Drive Cell for Input Ports
- •Setting Drive Resistance
- •Slew Related Commands
- •Technology and Design Rule Constraints
- •Operating Conditions
- •Estimating Capacitance and Resistance
- •Port Capacitance
- •Capacitance Limit
- •Fanout
- •Fanout Limit
- •External Sources and Sinks
- •Wire Capacitance
- •Wire Resistance
- •Wire Load Model Selection
- •Optimizing Before Place and Route
- •Running do_optimize Command
- •Top-Down Optimization
- •Bottom-Up Optimization
- •Deriving Constraints from Context
- •Time Budgeting
- •Preserving Module Contents
- •Uniquifying Instances
- •Collapsing Hierarchy
- •Incremental Optimization
- •Applying Timing Corrections
- •Optimizing with Logic Transforms
- •Introduction to Transforms
- •Logic Optimization Steps
- •Optimizing Generic Logic
- •Mapping and Unmapping of Generic Logic
- •Constraint-Driven Optimizing
- •Summary Listing of Transform Commands
- •Optimizing After Place and Route
- •Timing Analysis
- •Backannotating
- •A Script Showing the Backannotation of a Design
- •Reading SDF Data
- •Optimizing to Correct Late and Early Slack
- •Report Generation
- •Report Header
- •Timing Reports
- •Area Reports
- •Sample Area Report
- •Library Reports
- •Hierarchy Reports
- •Sample Hierarchy Report
- •Design Rule Violations Reports
- •Sample Design Rule Violations Report
- •VHDL Library Reports
- •Sample VHDL Library Report
- •End Point Slack and Path Histogram Reports
- •Fanin and Fanout Reports
- •Sample Fanin Report
- •Finite State Machine Reports
- •Sample FSM Report
- •Customizing Report Column Width
- •Using Tcl within ac_shell and pks_shell
- •The Tcl Language
- •Procedures
- •Tcl Variables and Control Structures
- •Variables
- •Syntax
- •Tcl Commands
- •get_names Command
- •Abbreviating Commands
- •Searching for Commands
- •Accessing Environment Variables
- •Returning Unix Command Values
- •Error Handling
- •Quick Reference
Ambit BuildGates Synthesis User Guide
Viewing the Schematic Design
Highlighting Path Between Pins
The pin-to-pin panel, shown in Figure 5-2, is accessed from the several object pop-up menus.
There are three ways to select the From and To pins on the pin-to-pin panel.
■Type in the object name.
■Click left mouse button on the down arrow next to the pin input field and select an object from the history list of previously selected objects.
■Place the cursor in the From or To pin input field; the diamond-shaped check box to the left of the field is highlighted. Click left mouse button on the desired object on the schematic to list the object name in the input field.
Figure 5-2 Sample Pin-To-Pin Panel
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XDraw |
Path Direction: To - From (default) |
Close Panel |
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From - To |
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Both Directions |
To Highlight the Path Between Two Pins:
1.Click left mouse button on the Options box to select the path direction.
2.Input the From and To pins as described above.
3.Click left mouse button on the XDraw icon to highlight the selected path on the schematic. The objects and path are highlighted based on either module level or path (default) depending on the setting in View–Schematic Preferences–Highlighting– Coloring Modes.
4.Click left mouse button on the Close icon to close the pin-to-pin panel.
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Viewing the Schematic Design
Viewing Bus Properties
The bus command window, shown in Figure 5-3, is accessed from the bus and bus port popup menus described in Table 5-8. The right column contains commands that can be executed for the bus components listed in the left column.
Commands are grayed-out and not executable if the function is invalid for the selected bus component. For example, an output data bus can have a fanin cone but not a fanout cone; therefore, the fanout cone command will not be listed in the commands.
The Fanin Cone, Fanout Cone, Worst Path to Pin, Highlight Object, and Pan to Source commands simply highlight the specified parameter. Show Constraints displays a dialog box containing port timing constraint information (see Figure 5-8).
Show Properties displays a net properties dialog box containing instance, pin, and direction information; see Figure 5-4 for a sample. Doubling clicking the left mouse button on an instance name in the net properties dialog displays an instance properties dialog box with pin and net information for the selected instance. From there you can double click on a net name in the dialog and get another information box. You may continue double clicking on the objects listed in the displayed dialog boxes to access additional related object information.
Figure 5-3 Sample Bus Commands Dialog
Commands are grayed-out if the design function is invalid for the bus selection
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Viewing the Schematic Design
Figure 5-4 Sample Net Properties Dialog
Double click an instance to display another information list
The sample task below describes how to display the net and instance properties of the dataout[7] bus port; refer to Figure 5-3 and Figure 5-4 for clarification.
Display Net and Instance Properties of a Bus Port:
1.Click right mouse button on bus port on the schematic to display the pop-up menu (refer to Table 5-8); move cursor to Bus Commands. Release the mouse button.
2.A listing of the bus components and associated bus commands is displayed (see Figure 5-3).
3.Click left mouse button on the desired bus component to highlight it.
4.Click left mouse button on the Show Properties button to display the net properties (see
Figure 5-4).
5.Double click left mouse button on a listed instance to display additional properties.
6.To close all of the displayed dialog boxes, click left mouse button on Cancel.
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