- •Contents
- •Preface
- •About This Manual
- •Other Information Sources
- •Syntax Conventions
- •Text Command Syntax
- •About the Graphical User Interface
- •Using Menus
- •Using Forms
- •Introduction to Ambit BuildGates Synthesis
- •Separately Licensed Software Products
- •Low Power Synthesis
- •Physically Knowledgeable Synthesis
- •Datapath Synthesis
- •AC_Shell / DC_Shell Equivalencies
- •Getting Started
- •Invoking Ambit BuildGates Synthesis
- •Exiting Ambit BuildGates Synthesis
- •Files Used in Ambit BuildGates Synthesis Software
- •Key Bindings and Mouse Operations
- •Using the GUI
- •Main Menu Functions
- •File Menu Options
- •Edit Menu Options
- •View Menu Options
- •Commands Menu Options
- •Reports Menu Options
- •Window Menu Options
- •Help Menu Options
- •The Tool Bar
- •The Browsers
- •The Module Browser
- •The Variable Browser
- •Work Area Tools
- •HDL and Tcl Editors
- •Constraints Tool
- •The Schematic Viewer
- •Distributed Processing
- •Update Mode
- •The ac_shell Console
- •The Status Bar
- •Flow Procedures
- •Typical Synthesis Flow
- •Read the Libraries
- •Read the Design Data
- •Build Generic Netlist
- •Set Constraints
- •Optimize the Design
- •Generate Reports
- •Save Final Netlist
- •Viewing the Schematic Design
- •How to Use the Schematic Viewer
- •Keyboard Shortcuts
- •Mouse Operations
- •Objects in the Schematic Database
- •Accessing Context-Sensitive Pop-Up Menus
- •Highlighting Path Between Pins
- •Viewing Bus Properties
- •The Schematic Tool Bar
- •The Module Title Bar
- •Searching for an Object
- •Grouping Instances
- •Dissolving Instances
- •Creating a Unique Module
- •Displaying Logic Cones
- •Extracting Logic Cones
- •Displaying Port Constraints
- •Printing a Schematic
- •Setting Constraints
- •Setting a Hierarchical Context
- •Units in Constraints
- •Timing Constraints
- •Timing Analysis
- •Setting up Timing Context
- •Clock Insertion Delay Time
- •Data Arrival Time
- •External Delay
- •Multicycle Paths
- •Setting Drive Cell for Input Ports
- •Setting Drive Resistance
- •Slew Related Commands
- •Technology and Design Rule Constraints
- •Operating Conditions
- •Estimating Capacitance and Resistance
- •Port Capacitance
- •Capacitance Limit
- •Fanout
- •Fanout Limit
- •External Sources and Sinks
- •Wire Capacitance
- •Wire Resistance
- •Wire Load Model Selection
- •Optimizing Before Place and Route
- •Running do_optimize Command
- •Top-Down Optimization
- •Bottom-Up Optimization
- •Deriving Constraints from Context
- •Time Budgeting
- •Preserving Module Contents
- •Uniquifying Instances
- •Collapsing Hierarchy
- •Incremental Optimization
- •Applying Timing Corrections
- •Optimizing with Logic Transforms
- •Introduction to Transforms
- •Logic Optimization Steps
- •Optimizing Generic Logic
- •Mapping and Unmapping of Generic Logic
- •Constraint-Driven Optimizing
- •Summary Listing of Transform Commands
- •Optimizing After Place and Route
- •Timing Analysis
- •Backannotating
- •A Script Showing the Backannotation of a Design
- •Reading SDF Data
- •Optimizing to Correct Late and Early Slack
- •Report Generation
- •Report Header
- •Timing Reports
- •Area Reports
- •Sample Area Report
- •Library Reports
- •Hierarchy Reports
- •Sample Hierarchy Report
- •Design Rule Violations Reports
- •Sample Design Rule Violations Report
- •VHDL Library Reports
- •Sample VHDL Library Report
- •End Point Slack and Path Histogram Reports
- •Fanin and Fanout Reports
- •Sample Fanin Report
- •Finite State Machine Reports
- •Sample FSM Report
- •Customizing Report Column Width
- •Using Tcl within ac_shell and pks_shell
- •The Tcl Language
- •Procedures
- •Tcl Variables and Control Structures
- •Variables
- •Syntax
- •Tcl Commands
- •get_names Command
- •Abbreviating Commands
- •Searching for Commands
- •Accessing Environment Variables
- •Returning Unix Command Values
- •Error Handling
- •Quick Reference
Ambit BuildGates Synthesis User Guide
Using the GUI
Work Area Tools
The Ambit BuildGates synthesis tool provides the following design tools, which are described in detail in the following sections.
■The HDL Editor
■The Tcl Editor
■Constraints tool
■The Schematic Viewer
■Distributed processing
The HDL editor and constraints tool contain commands that have ac_shell command line equivlalents. For a cross-reference between these commands and ac_shell command line commands, refer to Appendix B, “Quick Reference”.
HDL and Tcl Editors
To display an editor or viewer such that it occupies the whole main screen window instead of only a portion of the window, place the cursor in the editor portion and press the Control-m keys. Repeatedly pressing Control-m toggles between the standard split-screen and the whole-screen display.
Note: Opening an HDL or Tcl file with the editor does not load/read the design file. However, the “Save and Parse” option button for both HDL and Tcl does load the file; see the following sections. Also, refer to “File Menu Options” on page 38 for instructions on loading a file.
The HDL Editor
The HDL Editor (shown in Figure 3-24) displays and edits Verilog and VHDL files. The text displayed in the HDL editor is color-coded by type: normal, operator, comparator, number, and so on. You can specify custom colors in View–General Preferences–Colors–Color Items.
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Figure 3-24 The HDL Editor
HDL file name
/sample/database/cpu.v |
column |
|
num |
||
|
line num
HDL button bar
The HDL file’s path and name are displayed on the dialog box above the HDL text. This field can be used to specify the path and name of another file to display and/or edit. Click the scrolldown arrow to the right of the file name field to display the pull down menu showing the history of all the files previously opened. To re-open a previously opened file, click the left mouse button on a file in the history list.
The line number and column number fields display the current line and column numbers of the insertion cursor. These fields can be edited to position the cursor at a specific location in the file. To do so: click left mouse button in the field, overwrite the current value, and press the Return key. Lines start at 1 and columns start at 0.
The HDL button bar provides the following file operations.
Button |
Description |
|
|
Verilog/ |
Toggle between Verilog or VHDL to indicate the type of source code file to |
VHDL |
display and open. |
|
|
New HDL |
Open a blank edit page to write new HDL code. |
Script |
|
|
|
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Button Description
Open HDL
File
Open an HDL file.
If HDL is the default editor, then double clicking a module in the module browser will open the associated HDL file in the editor. Refer to “View Menu Options” on page 42 for setting the editor/viewer default.
Save HDL |
Save the current file using the current, displayed file name. To close a file |
File |
without saving changes, click New HDL Script. |
|
|
Save as |
Save the current file to a new location and name. |
HDL File |
|
|
|
Save + |
Save the current file using the current file name and automatically call the |
Parse |
appropriate HDL parser. |
|
|
Search and |
Display the Search dialog. “Searching in the Editors” on page 82 for more |
Replace |
information. |
|
|
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Using the GUI
The Tcl Editor
The Tcl Editor (shown in Figure 3-25) displays and edits Tcl files.
Figure 3-25 The Tcl Editor
Tcl file name
/sample/database/cpu.tcl |
column |
|
num |
||
|
line num
Tcl button bar
The Tcl file’s path and name are displayed on the dialog box above the Tcl text. This field can be used to specify the path and name of another file to display and/or edit. Click the scrolldown arrow to the right of the file name field to display the pull down menu showing the history of all the files previously opened. To re-open a previously opened file, click left mouse button on a file in the history list.
The line number and column number fields display the current line and column numbers of the insertion cursor. These fields can be edited to position the cursor at a specific location in the file. To do so: click left mouse button in the field, overwrite the current value, and press the Return key. Lines start at 1 and columns start at 0.
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The Tcl button bar provides the following file operations.
Button |
Description |
|
|
New Tcl |
Open a blank edit page to write new Tcl code. |
Script |
|
|
|
Open Tcl |
Open an Tcl file. |
File |
|
|
|
Save Tcl |
Save the current file using the current, displayed file name. To close a file |
File |
without saving changes, click New Tcl Script. |
|
|
Save as Tcl |
Save the current file to a new location and name |
File |
|
|
|
Save + |
Save the current file using the current file name and automatically source |
Parse |
the file. |
|
|
Search and |
Display the search dialog. Refer to Searching in the Editors for more |
Replace |
information. |
|
|
Searching in the Editors
The search mechanism and interface, shown in Figure 3-26, is the same for both the HDL and Tcl editors.
Figure 3-26 Searching Within the Editors
To Search for a String
1. Open the HDL or Tcl file as described in the above sections.
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2.Click the Search and Replace icon to display the window shown in Figure 3-26.
3.Enter the search string in the Text to Search field.
4.If replacement is desired, enter the replacement text in the Text to Search field.
5.If desired, select the following options:
Search up/Search down — to specify direction of search. Search down is the default.
Match case — to match upper/lower case sensitivity in search string.
Replace all — to replace all instances of the search string with the specified replacement string. Press the Replace button to automatically replace all instances without prompting.
6.Click Find to search for the string. Continue to click Find until the desired occurrence is displayed and highlighted.
7.If text replacement is desired, click Replace to replace the search string with the string specified.
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