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Аналіз обчислювальної похибки при виконанні базових операцій алгоритмів цифрової обробки сигналів. Обчислення математичних функцій роектування комп’ютерних засобів обробки сигналів та зображень Ваврук. Лаби для 13 групи / MAZ / MAZ-DOD-MAT-2012 / tms320tci6618.pdf

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INFORMATION ADVANCE

TMS320TCI6618

Communications Infrastructure KeyStone SoC

SPRS688—February 2011	www.ti.com

7.6.1.2 Device-Specific MPU Registers

7.6.1.2.1 Configuration Register (CONFIG)

The configuration register (CONFIG) contains the configuration value of the MPU.

Figure 7-10 Configuration Register (CONFIG)

ADDR_WIDTH

NUM_FIXED

NUM_PROG

NUM_AIDS

Reserved

ASSUME_ALLOWED

MPU0

R-0

R-4

R-16

R-0

R-1

Reset Values

MPU1

R-16

MPU2

R-1

MPU3

R-16

Legend: R = Read only; -n = value after reset

Table 7-30			Configuration Register (CONFIG) Field Descriptions

Bits		Field		Description
31	– 24	ADDR_WIDTH		Address alignment for range checking
				0	= 1KB alignment
				6	= 64KB alignment

23	– 20	NUM_FIXED		Number of fixed address ranges

19	– 16	NUM_PROG		Number of programmable address ranges

15	– 12	NUM_AIDS		Number of supported AIDs

11	– 1	Reserved		Reserved. Always reads as 0.

0		ASSUME_ALLOWED		Assume allowed bit. When an address is not covered by any MPU protection range, this bit determines whether the
				transfer is assumed to be allowed or not.
				0	= Assume disallowed
				1	= Assume allowed

7.6.2 MPU Programmable Range Registers

7.6.2.1 Programmable Range n Start Address Register (PROGn_MPSAR)

The programmable address start register holds the start address for the range. This register is writeable by a supervisor entity only. If NS = 0 (non-secure mode) in the associated MPPA register, then the register is also writeable only by a secure entity.

The start address must be aligned on a page boundary. The size of the page is 1K byte. The size of the page determines the width of the address field in MPSAR and MPEAR.

Figure 7-11 Programmable Range n Start Address Register (PROGn_MPSAR)

31	10	9	0
START_ADDR			Reserved

R/W			R

Legend: R = Read only; R/W = Read/Write

140	Copyright 2011 Texas Instruments Incorporated

TMS320TCI6618

Communications Infrastructure KeyStone SoC

www.ti.com

SPRS688—February 2011

Table 7-31

Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU0)

Bits

Name

Reset Value

Range

Description

31 – 10

START_ADDR

0x7400

Programmable

Start address for range 0.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x7C00

Programmable

Start address for range 1.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8000

Programmable

Start address for range 2.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8600

Programmable

Start address for range 3.

INFORMATION

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8C80

Programmable

Start address for range 8.

31 – 10

START_ADDR

0x8700

Programmable

Start address for range 4.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x87C0

Programmable

Start address for range 5.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8800

Programmable

Start address for range 6.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8C40

Programmable

Start address for range 7.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

ADVANCE

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8CC0

Programmable

Start address for range 9.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x8D40

Programmable

Start address for range 10.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x9000

Programmable

Start address for range 11.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x9400

Programmable

Start address for range 12.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x94C0

Programmable

Start address for range 13.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x9800

Programmable

Start address for range 14.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0x9880

Programmable

Start address for range 15.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

End of Table 7-31

Table 7-32

Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU1) (Part 1 of 2)

Bits

Name

Reset Value

Range

Description

31 – 10

START_ADDR

0xD0000

Programmable

Start address for range 0.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0xD0080

Programmable

Start address for range 1.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

31 – 10

START_ADDR

0xD0180

Programmable

Start address for range 2.

9 – 0

Reserved

000h

Reserved. Always reads as 0.

141

INFORMATION ADVANCE

TMS320TCI6618
Communications Infrastructure KeyStone SoC
SPRS688—February 2011						www.ti.com
						www.ti.com
Table 7-32	Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU1) (Part 2 of 2)

Register		Bits	Name	Reset Value	Range	Description
Register 3		31 – 10	START_ADDR	0xD01A0	Programmable	Start address for range 3.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 4		31 – 10	START_ADDR	0xD02E0	Programmable	Start address for range 4.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 5		31 – 10	START_ADDR	0xD0200	Programmable	Start address for range 5.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

End of Table 7-32

Table 7-33	Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU2)

Register		Bits	Name	Reset Value	Range	Description
Register 0		31 – 10	START_ADDR	0xA800	Programmable	Start address for range 0.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 1		31 – 10	START_ADDR	0xA880	Programmable	Start address for range 1.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 2		31 – 10	START_ADDR	0xA900	Programmable	Start address for range 2.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 3		31 – 10	START_ADDR	0xA980	Programmable	Start address for range 3.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 4		31 – 10	START_ADDR	0xA9A0	Programmable	Start address for range 4.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 5		31 – 10	START_ADDR	0xA9A4	Programmable	Start address for range 5.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 6		31 – 10	START_ADDR	0xA9A8	Programmable	Start address for range 6.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 7		31 – 10	START_ADDR	0xA9AC	Programmable	Start address for range 7.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 8		31 – 10	START_ADDR	0xA9B0	Programmable	Start address for range 8.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 9		31 – 10	START_ADDR	0xA9B8	Programmable	Start address for range 9.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 10		31 – 10	START_ADDR	0xAA00	Programmable	Start address for range 10.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 11		31 – 10	START_ADDR	0xAA40	Programmable	Start address for range 11.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 12		31 – 10	START_ADDR	0xAA80	Programmable	Start address for range 12.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 13		31 – 10	START_ADDR	0xAAA0	Programmable	Start address for range 13.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 14		31 – 10	START_ADDR	0xAAD0	Programmable	Start address for range 14.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

Register 15		31 – 10	START_ADDR	0xAAE0	Programmable	Start address for range 15.

		9 – 0	Reserved	000h		Reserved. Always reads as 0.
		9 – 0	Reserved	000h		Reserved. Always reads as 0.

End of Table 7-33


142						Copyright 2011 Texas Instruments Incorporated

									TMS320TCI6618
							Communications Infrastructure KeyStone SoC
www.ti.com									SPRS688—February 2011
www.ti.com
Table 7-34	Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU3)

Register	Bits	Name		Reset Value		Range		Description
Register 0	31 – 16	START_ADDR		0x9900		Programmable		Start address for range 0.

	9 – 0	Reserved		000h				Reserved. Always reads as 0.
	9 – 0	Reserved		000h				Reserved. Always reads as 0.

End of Table 7-34

Table 7-35	Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions (MPU4)

Register	Bits		Name		Reset Values		Range		Description
Register 0	31 – 10		START_ADDR		0x8400		Programmable		Start address for range N.

	9 – 0		Reserved		000h				Reserved. Always reads as 0.
	9 – 0		Reserved		000h				Reserved. Always reads as 0.

Register 1	31 – 10		START_ADDR		0x7E00		Programmable		Start address for range N.

	9 – 0		Reserved		000h				Reserved. Always reads as 0.
	9 – 0		Reserved		000h				Reserved. Always reads as 0.

7.6.2.2 Programmable Range n - End Address Register (PROGn_MPEAR)

The programmable address end register holds the end address for the range. This register is writeable by a supervisor entity only. If NS = 0 (non-secure mode) in the associated MPPA register then the register is also writeable only by a secure entity.

The end address must be aligned on a page boundary. The size of the page depends on the MPU number. The page size for MPU1 is 1K byte and for MPU2 it is 64K bytes. The size of the page determines the width of the address field in MPSAR and MPEAR

Figure 7-12 Programmable Range n End Address Register (PROGn_MPEAR)

31	10	9	0
END_ADDR			Reserved

R/W			R
Legend: R = Read only; R/W = Read/Write

Table 7-36	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU0)

Register	Bits	Name	Reset Value	Range	Description
Register 0	31 – 10	END_ADDR	0x75E0	Programmable	End address for range 0.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 1	31 – 10	END_ADDR	0x7DFF	Programmable	End address for range 1.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 2	31 – 10	END_ADDR	0x827F	Programmable	End address for range 2.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 3	31 – 10	END_ADDR	0x86BF	Programmable	End address for range 3.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 4	31 – 10	END_ADDR	0x8783	Programmable	End address for range 4.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 5	31 – 10	END_ADDR	0x87DF	Programmable	End address for range 5.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 6	31 – 10	END_ADDR	0x89C0	Programmable	End address for range 6.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

ADVANCE INFORMATION

143

INFORMATION ADVANCE

TMS320TCI6618
Communications Infrastructure KeyStone SoC
SPRS688—February 2011					www.ti.com
					www.ti.com
Table 7-36	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU0)

Register	Bits	Name	Reset Value	Range	Description
Register 7	31 – 10	END_ADDR	0x8C40	Programmable	End address for range 7.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 8	31 – 10	END_ADDR	0x8C80	Programmable	End address for range 8.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 9	31 – 10	END_ADDR	0x8CC0	Programmable	End address for range 9.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 10	31 – 10	END_ADDR	0x8D43	Programmable	End address for range 10.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 11	31 – 10	END_ADDR	91CF	Programmable	End address for range 11.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 12	31 – 10	END_ADDR	0x9480	Programmable	End address for range 12.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 13	31 – 10	END_ADDR	0x9500	Programmable	End address for range 13.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 14	31 – 10	END_ADDR	0x982F	Programmable	End address for range 14.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 15	31 – 10	END_ADDR	0x9881	Programmable	End address for range 15.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

End of Table 7-36

Table 7-37	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU1)

Register	Bits	Name	Reset Value	Range	Description
Register 0	31 – 10	END_ADDR	0xD007F	Programmable	End address for range 0.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 1	31 – 10	END_ADDR	0xD017F	Programmable	End address for range 1.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 2	31 – 10	END_ADDR	0xD019F	Programmable	End address for range 2.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 3	31 – 10	END_ADDR	0xD02DF	Programmable	End address for range 3.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 4	31 – 10	END_ADDR	0xD02FF	Programmable	End address for range 4.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 5	31 – 10	END_ADDR	0xD02FF	Programmable	End address for range 5.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

End of Table 7-37

Table 7-38	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU2) (Part 1 of 2)

Register	Bits	Name	Reset Value	Range	Description
Register 0	31 – 10	END_ADDR	0xA87F	Programmable	End address for range 0.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

Register 1	31 – 10	END_ADDR	0xA8FF	Programmable	End address for range 1.

	9 – 0	Reserved	3FFh		Reserved. Always reads as 0.

144	Copyright 2011 Texas Instruments Incorporated

						TMS320TCI6618
					Communications Infrastructure KeyStone SoC
www.ti.com						SPRS688—February 2011
www.ti.com
Table 7-38	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU2) (Part 2 of 2)

Register	Bits		Name	Reset Value	Range	Description
Register 2	31 – 10		END_ADDR	0xA97F	Programmable	End address for range 2.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 3	31 – 10		END_ADDR	0xA99F	Programmable	End address for range 3.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 4	31 – 10		END_ADDR	0xA9A3	Programmable	End address for range 4.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 5	31 – 10		END_ADDR	0xA9A7	Programmable	End address for range 5.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.	INFORMATION
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 6	31 – 10		END_ADDR	0xA9AB	Programmable	End address for range 6.
	31 – 10		END_ADDR	0xA9AB	Programmable	End address for range 6.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 7	31 – 10		END_ADDR	0xA9AF	Programmable	End address for range 7.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 8	31 – 10		END_ADDR	0xA9B7	Programmable	End address for range 8.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 9	31 – 10		END_ADDR	0xA9BF	Programmable	End address for range 9.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 10	31 – 10		END_ADDR	0xAA3F	Programmable	End address for range 10.
							ADVANCE
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

	9 – 0		Reserved	3FFh	Programmable	Reserved. Always reads as 0.
Register 11	31 – 10		END_ADDR	0xAA7F	Programmable	End address for range 11.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
Register 12	31 – 10		END_ADDR	0xAA9F	Programmable	End address for range 12.
Register 12	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 13	31 – 10		END_ADDR	0xAACF	Programmable	End address for range 13.



Register 14	31 – 10		END_ADDR	0xAADE	Programmable	End address for range 14.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 15	31 – 10		END_ADDR	0xAAFF	Programmable	End address for range 15.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

End of Table 7-38

Table 7-39	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU3)

Register	Bits		Name	Reset Value	Range	Description
Register 0	31 – 16		END_ADDR	9901h	Programmable	End address for range 0.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

End of Table 7-39

Table 7-40	Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions (MPU4)

Register	Bits		Name	Reset Value	Range	Description
Register 0	31 – 10	END_ADDR		0x857F	Programmable	Start address for range N.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

Register 1	31 – 10	END_ADDR		0x7F7F	Programmable	Start address for range N.

	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.
	9 – 0		Reserved	3FFh		Reserved. Always reads as 0.

End of Table 7-40


Copyright 2011 Texas Instruments Incorporated						145

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