Envisia HDL Modeling Reference

Finite State Machine Structure and Optimization

BuildGates Synthesis and Finite State Machines

Figure 4-3 shows a typical high-level synthesis flow and identifies at what point in the flow to:

■Extract the state transition table for the FSM

■Perform FSM optimizations and checks

Figure 4-3 Finite State Machine Flow in BuildGates Synthesis Tool

Read Libraries

Read Design Data

FSM Extraction

State transition table construction

FSM Optimizations and Checks

Unreachable state removal

State assignment or re-encoding

State minimization

Terminal state check

Logic Netlist Construction

Set Timing Constraints

Optimize Design

Generate Reports

Save Final Netlist