Chapter 10

Foundation Express Packages

Three VHDL packages are included with this release. This chapter discusses the contents of each package. Each section of this chapter explains one of these packages.

•“std_logic_1164 Package”

Defines a standard for designers to use when describing the interconnection data types used in VHDL modeling

•“std_logic_arith Package”

Provides a set of arithmetic, conversion, and comparison functions for SIGNED, UNSIGNED, INTEGER, STD_ULOGIC, STD_LOGIC, and STD_LOGIC_VECTOR types

•“numeric_std Package”

The numeric_std package is an alternative to the std_logic_arith package. It is the IEEE standard 1076.3-1997, and documentation about it is available from IEEE.

•“std_logic_misc Package”

Defines supplemental types, subtypes, constants, and functions for the std_logic_1164 package.

•“ATTRIBUTES Package”

Declares synthesis attributes and the resource sharing subtype and its attributes.

std_logic_1164 Package

This package defines the IEEE standard for designers to use when describing the interconnection data types used in VHDL modeling. The logic system defined in this package might be insufficient for