Chapter 2
Design Descriptions
Each VHDL structural design can have four parts, which this chapter discusses in the following major sections.
•“Entities”
•“Architecture”
•“Configurations”
•“Packages”
•“Resolution Functions”
Entities
An entity defines the input and output ports of a design. A design can contain more than one entity. Each entity has its own architecture statement.
The syntax follows.
entity entity_name is [ generic generic_declarations );] [ port ( port_declarations ) ;]
end [ entity_name ] ;
•entity_name is the name of the entity.
•generic_declarations determine local constants used for sizing or timing the entity.
•port_declarations determine the number and type of input and output ports.
You cannot use the declaration of other in the entity specification.
An entity serves as an interface to other designs, by defining entity characteristics that must be known to Foundation Express before it can connect the entity to other entities and components.
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VHDL Reference Guide
For example, before you can connect a counter to other entities, you must specify the number and types of its input and output ports, as shown in the following example.
entity NAND2 is |
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port(A, B: in BIT; |
-- Two |
inputs, A |
and B |
Z: out BIT); |
-- One |
output, Z |
= (A and B)’ |
end NAND2; |
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Entity Generic Specifications
Generic specifications are entity parameters. Generics can specify the bit-widths of components—such as adders—or can provide internal timing values.
A generic can have a default value. It receives a nondefault value only when the entity is instantiated (see the “Declarations” section of this chapter) or configured (see the “Configurations” section of this chapter). Inside an entity, a generic is a constant value.
The syntax follows.
generic(
constant_name : type [ := value ]
{ ; constant_name : type [ := value ] } );
•constant_name is the name of a generic constant.
•type is a previously defined data type.
•Optional value is the default value of constant_name.
Entity Port Specifications
Port specifications define the number and type of ports in the entity. The syntax follows.
port(
port_name : mode port_type
{ ; port_name : mode port_type} );
•port_name is the name of the port.
•mode is any of these four values.
• in can only be read.
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