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Concurrent Statements

Driving Signals

If a process assigns a value to a signal, the process is a driver of that signal. If more than one process or other concurrent statement drives a signal, that signal has multiple drivers.

The following example shows two three-state buffers driving the same signal (SIG). The resulting circuit design is shown in the figure following the example. To learn to infer three-state devices in VHDL, see “Three-State Inference” section of the “Register and Three-State Inference” chapter.

A_OUT <= A when ENABLE_A else ’Z’; B_OUT <= B when ENABLE_B else ’Z’; process(A_OUT)

begin

SIG <= A_OUT; end process; process(B_OUT) begin

SIG <= B_OUT; end process;

ENABLE_B

B SIG

ENABLE_A

A

X8663

Figure 6-3 Two Three-State Buffers Driving the Same Signal

Bus resolution functions assign the value for a signal with multiple drivers. For more information, see “Resolution Functions” section of the “Design Descriptions” chapter.

block Statements

A block statement (which is concurrent) contains a set of concurrent statements. The order of the concurrent statements does not matter, because all statements are always executing.

VHDL Reference Guide

6-7

VHDL Reference Guide

Note: Foundation Express does not create a new level of design hierarchy from a block statement.

The syntax of a block statement follows.

label: block[ (expression) ]

{block_declarative_item } begin

{concurrent_statement } end block [ label ];

label, which is required, names the block.

expression is the guard condition for the block. When this optional expression is present, Foundation Express evaluates the expression and creates a Boolean signal called GUARD.

A block_declarative_item declares objects local to the block, which can be any of the following items.

use clause

subprogram declaration

subprogram body

type declaration

subtype declaration

constant declaration

signal declaration

component declaration

Objects declared in a block are visible to that block and to all blocks nested within. When a child block (inside a parent block) declares an object with the same name as an object in the parent block, the child block’s declaration overrides that of the parent.

Nested Blocks

The description in the following example uses nested blocks. The resulting circuit schematic is shown in the figure following the example.

B1: block

signal S: BIT; -- Declaration of "S" in block B1

6-8

Xilinx Development System

Concurrent Statements

begin

S <= A and B; -- "S" from B1

B2: block

signal S: BIT; -- Declaration of "S" in block B2

begin

 

 

S <= C and D;

-- "S" from B2

B3: block

 

 

begin

 

 

Z <= S;

 

-- "S" from B2

end block B3;

 

end block B2;

 

 

Y <= S;

-- "S" from B1

end block B1;

 

 

AN2

A

Y

B

AN2

C

Z

D

X8642

Figure 6-4 Schematic of Nested Blocks

Guarded Blocks

The description in the following example uses guarded blocks. In the example, z has the same value as a.

entity EG1 is

port (a: in BIT; z: out BIT); end;

architecture RTL of EG1 is begin

guarded_block: block (a = ’1’) begin

z <= ’1’ when guard else ’0’;

VHDL Reference Guide

6-9

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