VHDL Reference Guide

Figure 5-11 Circuit for Using Component Implication Directives on a Function

Example without Component Implication Directives

The following example shows the same design as the previous example but without the creation of an entity for the function. The component implication directives have been removed. The corresponding circuit design is shown in the figure following the example.

package MY_PACK is

subtype TWO_BIT is BIT_VECTOR(1 to 2); function MUX_FUNC(A,B: in TWO_BIT; C: in BIT)

return TWO_BIT;

end;

package body MY_PACK is

function MUX_FUNC(A,B: in TWO_BIT; C: in BIT) return TWO_BIT is

begin

if(C = ’1’) then return(A);

else return(B);

end if; end;

end;

use WORK.MY_PACK.ALL;

entity TEST is

port(A: in TWO_BIT; C: in BIT; Z: out TWO_BIT); end;