VHDL Reference Guide
Figure 5-6 Circuit for for...loop Statement Operating on an
Entire Array
next Statements
The next statement skips execution to the next iteration of an enclosing loop statement, called label in the syntax, as follows.
next [ label ] [ when condition ] ;
•label: A next statement with no label terminates the current iteration of the innermost enclosing loop. When you specify a loop label, the current iteration of that named loop is terminated.
•when is an optional clause that executes its next statement when its condition (a Boolean expression) evaluates TRUE.
The following example uses the next statement to copy bits conditionally from bit vector B to bit vector A only when the next condition
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Sequential Statements
evaluates to TRUE. The corresponding design is shown in the figure following the example.
entity example5_14 is port(
signal B, COPY_ENABLE: in BIT_VECTOR (1 to 8); signal A: out BIT_VECTOR (1 to 8)
);
end example5_14;
architecture behave of example5_14 is
begin
process (B, Copy_ENABLE) begin
A <= “00000000";
for I in 1 to 8 loop
next when COPY_ENABLE(I) = ’0’; A(I) <= B(I);
end loop;
end process; end behave;
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VHDL Reference Guide
Figure 5-7 Circuit Design for next Statement
The example below shows the use of nested next statements in named loops. This example processes in the following manner.
•The first element of vector X against the first element of vector Y
•The second element of vector X against each of the first two elements of vector Y
•The third element of vector X against each of the first three elements of vector Y
The processing continues in this manner until it is completed.
signal X, Y: BIT_VECTOR(0 to 7);
A_LOOP: for I in X’range loop
. . .
B_LOOP: for J in Y’range loop
. . .
next A_LOOP when I < J;
. . .
end loop B_LOOP;
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. . .
end loop A_LOOP;
exit Statements
The exit statement completes execution of an enclosing loop statement, called label in the syntax. The completion is conditional if the statement includes a condition, such as the when condition in the following syntax.
exit [ label ] [ when condition ] ;
•label: An exit statement with no label terminates the innermost enclosing loop. When you specify a loop label, the current iteration of than named loop is terminated, as shown in the previous example of a named next statement.
•when is an optional clause that executes its next statement when its condition (a Boolean expression) evaluates TRUE.
Note: The exit and next statements have identical syntax, and they both skip the remainder of the enclosing (or named) loop. The difference between the two statements is that exit terminates its loop and, then, continues with the next loop iteration (if any).
The example below compares two bit vectors. An exit statement exits the comparison loop when a difference is found. The corresponding circuit design is shown in the figure following this example.
entity example5 16 is port(
signal A, B: in BIT_VECTOR(1 downto 0); signal A_LESS_THAN_B: out Boolean;
);
end example5 16;
architecture behave of example5 16 is
begin
process (A, B) begin
A_LESS_THAN_B <= FALSE;
for I in 1 downto 0 loop
if (A(I) = ’1’ and B(I) = ’0’) then A_LESS_THAN_B <= FALSE;
exit;
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