Sequential Statements

for...loop Statements

The for...loop statement has an integer iteration scheme. The integer range determines the number of repetitions The syntax for a for...loop statement follows.

[label :] for identifier in range loop { sequential_statement }

end loop [label];

•label, which is optional, names this loop.

•identifier is specific to the for..loop statement.

identifier is not declared elsewhere. It is automatically declared by the loop itself and is local to the loop. A loop identifier overrides any other identifier with the same name but only within the loop.

The value of identifier can be read only inside its loop (identifier does not exist outside the loop). You cannot assign a value to a loop identifier.

•range must be a computable integer range in either of the following two forms.

integer_expression to integer_expression

integer_expression downto integer_expression

•integer_expression evaluates to an integer. For more informations, see the “Expressions” chapter.

•sequential_statement can be any statement described in this chapter. Two sequential statements are used only with loops.

•next statement skips the remainder of the current loop and continues with the next loop iteration.

•exit statement skips the remainder of the current loop and continues with the next statement after the exited loop.

See the “next Statements” section and “exit Statements” section of this chapter.

Note: Computable loops (for...loop statements) must not contain wait statements. Otherwise, a race condition may result.

VHDL Reference Guide

Steps in the Execution of a for...loop Statement

A for...loop statement executes as follows.

1.A new integer variable, which is local to the loop, is declared with the name identifier.

2.The identifier receives the first value of range, and the sequence of statements executes once.

3.The identifier receives the next value of range, and the sequence of statements executes once more.

4.Step 3 is repeated until identifier receives the last value in range. The sequence of statements then executes for the last time. Execution continues with the statement following the end loop. The loop is then inaccessible.

The following example shows two equivalent code fragments. The resulting circuit design is shown in the figure following the example.

variable A, B: BIT_VECTOR(1 to 3);

--First fragment is a loop statement for I in 1 to 3 loop

A(I) <= B(I); end loop;

--Second fragment is three statements A(1) <= B(1);

A(2) <= B(2);

A(3) <= B(3);

B [1] A [1]

B [2] A [2]

B [3] A [3]

X8646

Figure 5-5 Circuit for for...loop Statement with Equivalent

Fragments

Sequential Statements

for...loop Statements and Arrays

You can use a loop statement to operate on all elements of an array without explicitly depending on the size of the array. The following example shows how to use the VHDL array attribute ’range to invert each element of bit vector A. A figure of the resulting circuit follows the example. Unconstrained arrays and array attributes are described in “Array Types” section of the “Data Types” chapter.

entity example5_13 is port(

A:out BIT_VECTOR(1 to 10);

B:in BIT_VECTOR(1 to 10)

);

end example5_13;

architecture behave of example5_13 is begin

process (B) begin

for I in A’range loop A(I) := not B(I);

end loop;

end process; end behave;