Design Descriptions

The following example shows a type declaration for type NEW_BIT and some functions and variables of that type.

type NEW_BIT is (’0’, ’1’, ’X’); -- New logic type

function ”and”(I1, I2: in NEW_BIT) return NEW_BIT; function ”or” (I1, I2: in NEW_BIT) return NEW_BIT;

-- Declare overloaded operators for new logic type

. . .

signal A, B, C: NEW_BIT;

. . .

C <= (A and B) or C;

Subtype Declarations Use subtype declarations to define the name and characteristics of a constrained subset of another type or subtype. A subtype is fully compatible with its parent type, but only over the subtype’s range.

The following subtype declaration (NEW_LOGIC) is a subrange of the type declaration in the previous example.

subtype NEW_LOGIC is NEW_BIT range ’0’ to ’1’;

You can use subtype declarations wherever you use type declarations: in architectures, packages, entities, blocks, processes, and subprograms.

Examples of Architectures for NAND2 Entity

The following three examples show three different architectures for the entity NAND2. The three examples define equivalent implementations of NAND2. After optimization and synthesis, they all produce the same circuit, a 2-input NAND gate in the target technology. The architecture description style you use for this entity depends on your own preferences.

The first example shows how the entity NAND2 can be implemented by using two components from a technology library. The entity inputs A and B are connected to AND gate U0, producing an intermediate I signal. Signal I is then connected to inverter U1, producing the entity output Z.

architecture STRUCTURAL of NAND2 is signal I: BIT;