- •Navigating This Book
- •Table of Contents
- •Introduction
- •The History of Programmable Logic
- •Complex Programmable Logic Devices (CPLDs)
- •Why Use a CPLD?
- •Field Programmable Gate Arrays (FPGAs)
- •Design Integration
- •The Basic Design Process
- •HDL File Change Example
- •Before (16 x 16 multiplier):
- •After (32 x 32 multiplier):
- •Intellectual Property (IP) Cores
- •Design Verification
- •Xilinx Solutions
- •Introduction
- •Xilinx Devices
- •Platform FPGAs
- •Virtex FPGAs
- •Virtex-II Pro FPGAs
- •Virtex FPGAs
- •Spartan FPGAs
- •Spartan-3 FPGAs
- •Spartan-IIE FPGAs
- •Spartan-IIE Architectural Features
- •Xilinx CPLDs
- •XC9500 ISP CPLD Overview
- •XC9500XL 3.3V Family
- •XC9500XV 2.5V CPLD Family
- •CoolRunner Low-Power CPLDs
- •CoolRunner-II CPLDs
- •CoolRunner Reference Designs
- •Military and Aerospace
- •Automotive and Industrial
- •Design Tools
- •Design Entry
- •Synthesis
- •Implementation and Configuration
- •Board-Level Integration
- •Verification Technologies
- •Advanced Design Techniques
- •Embedded SW Design Tools Center
- •Xilinx IP Cores
- •Web-Based Information Guide
- •End Markets
- •Silicon Products and Solutions
- •Design Resources
- •System Resources
- •Xilinx Online (IRL)
- •Configuration Solutions
- •Processor Central
- •Tools and Partnerships
- •Memory Corner
- •Silicon
- •Design Tools and Boards
- •Technical Literature and Training
- •Connectivity Central
- •High-Speed Design Resources
- •Signal Integrity Tools
- •Partnerships
- •Signal Integrity
- •Services
- •Xilinx Design Services
- •Education Services
- •Live E-Learning Environment
- •Day Segment Courses
- •Computer-Based Training (CBT)
- •University Program
- •Design Consultants
- •Technical Support
- •Module Descriptions
- •WebPACK Design Suite
- •WebPACK Design Entry
- •WebPACK StateCAD
- •WebPACK MXE Simulator
- •WebPACK HDL Bencher Tool
- •WebPACK FPGA Implementation Tools
- •WebPACK CPLD Implementation Tools
- •WebPACK iMPACT Programmer
- •WebPACK ChipViewer
- •XPower
- •WebPACK CD-ROM Installation
- •Getting Started
- •Licenses
- •Projects
- •Summary
- •Introduction
- •Design Entry
- •The Language Template
- •Close the Language Templates
- •Edit the Counter Module
- •Save the Counter Module
- •Functional Simulation
- •State Machine Editor
- •Top-Level VHDL Designs
- •Top-Level Schematic Designs
- •ECS Hints
- •I/O Markers
- •Implementing CPLDs
- •Introduction
- •Synthesis
- •Constraints Editor
- •CPLD Reports
- •Timing Simulation
- •Configuration
- •Implementing FPGAs
- •Introduction
- •Synthesis
- •The Constraints File
- •FPGA Reports
- •Programming
- •Summary
- •Design Reference Bank
- •Introduction
- •Get the Most out of Microcontroller-Based Designs
- •Conventional Stepper Motor Control
- •Using a Microcontroller to Control a Stepper Motor
- •Stepper Motor Control Using a CPLD
- •PC-Based Motor Control
- •Design Partitioning
- •Conclusion
- •Documentation and Example Code
- •Website Reference
- •ACRONYMS
- •GLOSSARY OF TERMS
PROGRAMMABLE LOGIC DESIGN: QUICK START HANDBOOK • CHAPTER 2
CONNECTIVITY CENTRAL
The industry is moving from parallel to serial I/O. By using serial I/O, you can reduce system cost through fewer pins, cheaper PCBs, smaller connectors, lower EMI, better signal integrity, and noise immunity. In addition, serial I/O simplifies your system design and provides scalable bandwidth.
Our dedicated Serial Tsunami Solutions web portal is a one-stop shop for the latest design resources to enable serial design success.
Terabit networks (among other applications) require high-bandwidth system interconnect technology. The Xilinx SystemIO solution provides complete connectivity for high-performance applications, utilizing a combination of the FPGA physical interface, compliant IP cores, design tools, and partnerships.
Networking and Datapath Products
By using the Xilinx SystemIO networking IP cores and reference designs, you can quickly build your edge and core routers, layer2/3+
switches, optical cross connects, and LANs, WANs, and MANs.
Control Plane and Backplane Products
Building on our PCI IP leadership, we are also providing IP cores for more system interconnectivity standards, including PCI Express, PCI-X, Cardbus, and RapidIO.
HIGH-SPEED DESIGN RESOURCES
Xilinx Virtex-II series Platform FPGAs are the ideal solution for building high-performance designs. In addition, Xilinx provides a variety of system tools, reference designs, and application notes for help with your high-speed designs.
SIGNAL INTEGRITY TOOLS
Building a working system today requires knowing a great deal more than just logic design. The documents and links in this area will help you design a reliable PC board quickly.
PARTNERSHIPS
Xilinx works with other networking industry leaders to provide you with a complete connectivity solution, including device interoperability testing, thirdparty IP, and design services.
SIGNAL INTEGRITY
Building a working system today requires you to know more than just Boolean logic and HDL code. The documents and links in this area are designed to give you everything you need to achieve reliable PCB designs on the first try.
Let’s list the areas accessible from this web page:
Xilinx • 86