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- •Navigating This Book
- •Table of Contents
- •Introduction
- •The History of Programmable Logic
- •Complex Programmable Logic Devices (CPLDs)
- •Why Use a CPLD?
- •Field Programmable Gate Arrays (FPGAs)
- •Design Integration
- •The Basic Design Process
- •HDL File Change Example
- •Before (16 x 16 multiplier):
- •After (32 x 32 multiplier):
- •Intellectual Property (IP) Cores
- •Design Verification
- •Xilinx Solutions
- •Introduction
- •Xilinx Devices
- •Platform FPGAs
- •Virtex FPGAs
- •Virtex-II Pro FPGAs
- •Virtex FPGAs
- •Spartan FPGAs
- •Spartan-3 FPGAs
- •Spartan-IIE FPGAs
- •Spartan-IIE Architectural Features
- •Xilinx CPLDs
- •XC9500 ISP CPLD Overview
- •XC9500XL 3.3V Family
- •XC9500XV 2.5V CPLD Family
- •CoolRunner Low-Power CPLDs
- •CoolRunner-II CPLDs
- •CoolRunner Reference Designs
- •Military and Aerospace
- •Automotive and Industrial
- •Design Tools
- •Design Entry
- •Synthesis
- •Implementation and Configuration
- •Board-Level Integration
- •Verification Technologies
- •Advanced Design Techniques
- •Embedded SW Design Tools Center
- •Xilinx IP Cores
- •Web-Based Information Guide
- •End Markets
- •Silicon Products and Solutions
- •Design Resources
- •System Resources
- •Xilinx Online (IRL)
- •Configuration Solutions
- •Processor Central
- •Tools and Partnerships
- •Memory Corner
- •Silicon
- •Design Tools and Boards
- •Technical Literature and Training
- •Connectivity Central
- •High-Speed Design Resources
- •Signal Integrity Tools
- •Partnerships
- •Signal Integrity
- •Services
- •Xilinx Design Services
- •Education Services
- •Live E-Learning Environment
- •Day Segment Courses
- •Computer-Based Training (CBT)
- •University Program
- •Design Consultants
- •Technical Support
- •Module Descriptions
- •WebPACK Design Suite
- •WebPACK Design Entry
- •WebPACK StateCAD
- •WebPACK MXE Simulator
- •WebPACK HDL Bencher Tool
- •WebPACK FPGA Implementation Tools
- •WebPACK CPLD Implementation Tools
- •WebPACK iMPACT Programmer
- •WebPACK ChipViewer
- •XPower
- •WebPACK CD-ROM Installation
- •Getting Started
- •Licenses
- •Projects
- •Summary
- •Introduction
- •Design Entry
- •The Language Template
- •Close the Language Templates
- •Edit the Counter Module
- •Save the Counter Module
- •Functional Simulation
- •State Machine Editor
- •Top-Level VHDL Designs
- •Top-Level Schematic Designs
- •ECS Hints
- •I/O Markers
- •Implementing CPLDs
- •Introduction
- •Synthesis
- •Constraints Editor
- •CPLD Reports
- •Timing Simulation
- •Configuration
- •Implementing FPGAs
- •Introduction
- •Synthesis
- •The Constraints File
- •FPGA Reports
- •Programming
- •Summary
- •Design Reference Bank
- •Introduction
- •Get the Most out of Microcontroller-Based Designs
- •Conventional Stepper Motor Control
- •Using a Microcontroller to Control a Stepper Motor
- •Stepper Motor Control Using a CPLD
- •PC-Based Motor Control
- •Design Partitioning
- •Conclusion
- •Documentation and Example Code
- •Website Reference
- •ACRONYMS
- •GLOSSARY OF TERMS
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PROGRAMMABLE LOGIC DESIGN: QUICK START HANDBOOK • CHAPTER 2
The Ultimate Connectivity Platform
The first programmable device to combine embedded processors along with 3.125 Gbps transceivers, the Virtex-II Pro™ series of FPGAs addresses all existing connectivity requirements as well as the emerging high-speed interface standards.
Xilinx RocketIO™ transceivers offer a complete serial interface solution, supporting 10 Gigabit Ethernet with XAUI, 3GIO, and SerialATA, among others. Our SelectIO™-Ultra technology supports 840 Mbps LVDS and high-speed single-ended standards such as XSBI and SFI-4.
The Power of Integration
In a single off-the-shelf programmable device, you can take advantage of microprocessors, the highest density of on-chip memory, multi-gigabit serial transceivers, digital clock managers, on-chip termination, and more. The result is a dramatic simplification of board layout, a reduced bill of materials, and unbeatable time to market.
Enabling a New Development Paradigm
For the first time, you can partition and repartition your systems between hardware and software at any time during the development cycle – even after the product has shipped.
This means you can optimize the overall system, guaranteeing your performance target in the most cost-efficient manner. You can also debug hardware and software simultaneously at speed.
Industry-Leading Tools
Optimized for the PowerPC, Wind River Systems's industry-proven embedded tools are the premier support for real-time microprocessor and logic designs. Driving the Virtex-II Pro FPGA is the Xilinx lightning-fast ISE software, the most comprehensive, easy-to-use development system available.
Virtex FPGAs
The Xilinx Virtex series was the first line of FPGAs to offer one million system gates. Introduced in 1998, the Virtex product line fundamentally redefined programmable logic by expanding the traditional capabilities of FPGAs to include a powerful set of features that address board level problems for high performance system designs.
The latest devices in the Virtex-E series, unveiled in 1999, offer more than three million system gates.
Virtex-EM devices, introduced in 2000 and the first FPGAs to be manufactured using an advanced copper process, offer additional on-chip memory for network switch applications
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