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Word

Value

MSB 9

8

7

6

5

4

3

2

1

LSB 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

LN0

 

 

 

L

6

L6

L5

L4

L3

L2

L1

L0

0

0

5

LN1

1

0

0

0

L10

L9

L8

L7

0

0

6

CR0

 

 

CRC

8

CRC8

CRC7

CRC6 CRC5 CRC4

CRC3

CRC2

CRC1

CRC0

7

CR1

 

CRC

17

CRC17

CRC16

CRC15

CRC14

CRC13

CRC12

CRC11

CRC10

CRC9

Table 38.5 Line number and CRC in HD-SDI comprises four words immediately following EAV; the package is denoted EAV+LN+CRC. Bit 9 of each word is the complement of bit 8. Line number is coded in 11 bits, L10 through L0, conveyed in two words. The CRC covers the first active sample through the line number. An HD-SDI interface conveys two streams, each including EAV+LN+CRC and SAV sequences; one stream carries chroma-aligned words, the other carries luma-aligned words.

Analog sync and digital/analog timing relationships

In analog interlaced video, 0V denotes the start of either field. In digital video, 0V for the second field is unimportant; some people use 0V to denote the start of a frame.

To determine whether a line that is a candidate for a digitized ancillary signal actually contains such a signal, examine every chroma/luma pair for {200h, 40h}: If any pair is unequal to these values, a digitized ancillary signal is present.

In analog video, sync is conveyed by video levels “blacker than black.” Line sync is achieved by associating, with every scan line, a line sync (horizontal) datum denoted 0H (pronounced zero-H) defined at the midpoint of the leading (falling) edge of sync. Field and frame sync is achieved by associating, with every field, a vertical sync datum denoted 0V (pronounced zero-V).

Sync separation recovers the significant timing instants associated with an analog video signal. Genlock reconstructs a sampling clock.

The relationship between the digital and analog domains is established by the position of 0H with respect to some TRS element. Table 38.6 overleaf summarizes several standards for digital representation of component 4:2:2 video; the rightmost column gives the number of luma sample intervals between the first word of EAV and the 0H sample (if it were digitized).

Ancillary data

In 4:2:2 SD, and in HD, ancillary data is permitted immediately after any EAV (HANC), or immediately after SAV (VANC) on a line containing neither active picture nor digitized ancillary data. (In 576i, ancillary data is limited to lines 20 through 22 and 333 through 335.) An ancillary packet is introduced by an ancillary data flag (ADF) comprising the three-word sequence {0, 3FFh, 3FFh}.

CHAPTER 38

SDI AND HD-SDI INTERFACES

437

System

AR

Scanning

Standard

STL

SAL

EAV to 0H

483i29.97

 

525/59.94/2:1

SMPTE 125M, BT.601

858

720

12

 

 

 

 

 

 

 

576i25

 

625/50/2:1

EBU 3246, BT.601

864

720

16

 

 

 

 

 

 

 

483i29.97

16:9

525/59.94/2:1

SMPTE 267M, BT.601

1144

960

16

 

 

 

 

 

 

 

483p59.94

16:9

525/59.94/1:1

SMPTE 293M

1144

960

16

 

 

 

 

 

 

 

576i25

16:9

625/50/2:1

EBU 3246, BT.601

1152

960

21

 

 

 

 

 

 

 

720p60

16:9

750/60/1:1

SMPTE ST 296

1650

1280

110

 

 

 

 

 

 

 

1080i30

16:9

1125/60/2:1

SMPTE ST 274

2200

1920

88

 

 

 

 

 

 

 

1080p30

16:9

1125/30/1:1

SMPTE ST 274

2200

1920

88

 

 

 

 

 

 

 

1080p25

16:9

1125/25/1:1

SMPTE ST 274

2640

1920

192

 

 

 

 

 

 

 

1080p24

16:9

1125/24/1:1

SMPTE ST 274

2750

1920

192

 

 

 

 

 

 

 

Table 38.6 Digital to analog timing relationships. for several scanning standards are summarized. The rightmost column relates TRS to 0H; it gives the count of luma sample intervals from EAV word 0 (3FFh) to the 0H sample (if it were digitized).

SMPTE ST 291, Ancillary Data

Packet and Space Formatting.

An ANC packet must not interfere with active video, or with any TRS, SAV, or EAV. Multiple ANC packets are allowed, provided that they are contiguous. Certain ANC regions are reserved for certain purposes; consult SMPTE ST 291.

An ancillary packet comprises the three-word (4:2:2) or one-word (4fSC) ADF, followed by these elements:

A one-word data ID (DID)

A one-word data block number (DBN) or secondary DID (SDID)

A one-word data count (DC), from 0 to 255

Zero to 255 user data words (UDW)

A one-word checksum (CS)

Each header word – DID, DBN/SDID, and DC –

carries an 8-bit value. Bit 8 of each header word is parity, asserted if an odd number of bits 7 through 0 is set, and deasserted if an even number of bits is set. Bit 9 is coded as the complement of bit 8. (Codewords having 8 MSBs all-zero or all-one are thereby avoided; this prevents collision with the 0h and 3FFh codes used to introduce TRS and ANC sequences.)

Two types of ANC packet are differentiated by bit 7 of the DID word. If DID7 is asserted, the packet is Type 1; DID is followed by data block number (DBN). There are 128 DID codes available for Type 1 packets.

438

DIGITAL VIDEO AND HD ALGORITHMS AND INTERFACES

The DBN value indicates continuity: If zero, it is inactive; otherwise, it counts packets within each DID from 1 through 255, modulo 255.

If DID7 is negated, the packet is Type 2: The DID is followed by a secondary data ID (SDID), giving 127·255 (i.e., 32,385) ID codes for Type 2 packets.

Three DID values, 004h, 008h, and 00Ch indicate a Type 2 ANC packet coded with 8-bit data; other DID values in the range 001h through 00Fh are prohibited. DID 80h marks a packet for deletion. DID 84h marks the last ANC packet in a VANC or HANC region.

The data count (DC) word contains a value from 0 through 255 (protected by two parity bits), indicating the count of words in the user data area. The DC word spans all ten bits of the interface. Even if an 8-bit DID is indicated, SMPTE standards imply that the two least significant bits of the DC word are meaningful. (If they were not, then the count of user data words could not be uniquely determined.)

The checksum (CS) word provides integrity checking for the contents of an ancillary packet. In every word from DID through the last word of UDW, the MSB is masked out (to zero); these values are summed modulo 512. The 9-bit sum is transmitted in bits

8 through 0 of CS; bit 9 is coded as the complement of bit 8.

SDI coding

In the serial interface it is necessary for a receiver to recover the clock from the coded bitstream. The coded bitstream must therefore contain significant power at the coded bit rate. Coaxial cable attenuates highfrequency information; equalization is necessary to overcome this loss. Because equalizers involve highfrequency AC circuits, the coded bitstream should contain little power at very low frequencies: The code must be DC-free. To enable economical equalizers, the frequency range required for correct recovery of the signal should be as small as possible. A ratio of the highest to lowest frequency components of about 2:1 – where the coded signal is contained in one octave of bandwidth – is desirable. These considerations argue for a high clock rate. But it is obviously desirable to have

CHAPTER 38

SDI AND HD-SDI INTERFACES

439

Details of the application of SDI in the studio are found in Chapter 7 of Robin, Michael, and Michel Poulin (2000), Digital Television Fundamentals: Design and Installation of Video and Audio Systems,

Second Edition (New York: McGraw-Hill).

Figure 38.4

BNC connector

SMPTE ST 292, Bit-Serial Digital Interface for High-Definition Television Systems.

a low clock rate so as to minimize cost. The choice of a clock rate is a compromise between these demands.

SDI uses scrambled coding, where the data stream is serialized, then passed through a shift register arrangement with exclusive-or taps implementing a characteristic function x9 +x4 +1.

Scrambling techniques using a single scrambler are well known. But the SDI and HD-SDI scrambler has

a second-stage scrambler, whose characteristic function is x+1. The two cascaded stages offer improved performance over a conventional single-stage scrambler. The scrambling technique is self-synchronizing; there is no need for initialization.

The data rate at the interface is the word rate times the number of bits per word. It is standard to serialize 10-bit data; when coding 8-bit video, the two LSBs are forced to zero.

No provision is made to avoid data sequences that would result, after serialization and scrambling, in serial bit sequences with long runs of zeros or long runs of ones. But a long run of zeros or ones provides no signal transitions to enable a receiver to recover the clock! In practice, such pathological sequences are rare.

SDI is standardized for electrical transmission at ECL levels through coaxial cable, using a BNC connector as depicted in Figure 38.4. Distances between 200 m and 400 m are practical. SDI is also standardized for transmission through optical fiber. Fiber-optic interfaces for digital SD are straightforward adaptations of SDI.

HD-SDI coding

The SDI interface at 270 Mb/s was adapted to HD by scaling the bit rate by a factor of 5.5, yielding a bit rate of 1.485 Gb/s (or in 24.976, 29.97, or 59.94 Hz systems, 1.4851.001 Gb/s) – call these both “1.5 Gb/s.” HD-SDI is standardized in SMPTE ST 292. The interface is modeled after SD SDI, but there are two significant changes:

Chroma and luma are encoded in separate streams, each with its own TRS sequence. The streams are multiplexed, then scrambled.

Coded line number and a CRC are appended to the EAV portion of the TRS sequence (giving what is called EAV+LN+CRC).

440

DIGITAL VIDEO AND HD ALGORITHMS AND INTERFACES

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