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14-70 |
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CHUNG-YU WU |
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jωT |
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jωT |
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H(e |
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1 + ( 1 |
)(1 +C / 2C ) − j(C / C ) / 2A tan(ωT 2) |
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AO |
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1 2 |
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O |
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Hi(z)= |
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−(C1 / C2 ) |
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F(ω) |
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z −1 |
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F(ω)= |
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m(ω)= − |
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C1 |
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C1 / C2 |
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1 − m(ω) + jθ(ω) |
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2C2 |
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2A |
tan(ωT / 2) |
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o |
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C1 / C2 |
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A |
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ωT |
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F(ω) = |
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o |
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1+m |
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relative magnitude error |
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(1 − m)2 +θ 2 |
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−m |
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θ<<1 |
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F(ω)=-tan-1 |
−θ |
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tan-1θ |
θ |
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relative phase error |
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1 − m |
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m<<1 |
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θ<<1 |
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ωT<<1 , Ao >1000 , C1/C2 normal value.
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AoωT>>1 |
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Ao>1000=>0.1% |
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ω>> |
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Ao>100=>1% |
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A |
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A T |
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=> m and θ are very small. |
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But for ω<2/AoT , θ is large. |
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6. Finite Bandwidth of the OP AMP. |
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A(s)= |
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single-pole response |
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1/ A + S |
/ω |
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m(ω)=-e |
-k1 |
[1-KcosωT] |
k= |
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C +C |
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θ(ω)= e-k1KsinωT |
k1 ≡K woT/2 |
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If ωoT/2=πωo/ωc >>1 => m→0, θ→0.
**ωo 5ωc is adequate.
*The unity-gain bandwidth ωo of the OP AMP should be (at least) five times as large as the clock frequency ωc.
14-71 CHUNG-YU WU
ωo vs ωc:
(1) Given ωo, ωc should be chosen low enough so that the OP AMPs have enough time to settle.
But ωc should not be too low, or the noise aliasing effect becomes serious the antialiasing and smoothing filters must be too selective and too complex.
(2)Given ωc, ωo should be just high enough to assure that the stage can settle within each clock phase. Any higher value worsens unnecessarily the noise aliasing effect, and raises the dc power and chip area requirements of the op-amps.
(3)Ao=1000 (60dB), fo=10MHz, fp1=10KHz
choose fc=2MHz, and f<40 KHz Typically f/fc 48 i.e. ωoT 14
7.Finite Slew Rate of the OP AMP
*The output voltage of the OP AMP must be settled down with the clock active duration.
tslew + t settle<T2
*May cause nonlinear distortion.
8.Nonzero OP AMP Output Resistance
2Ro ( |
C1C2 |
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+CL ) T1 < |
1 |
TΦ2=1 |
C +C |
2 |
7 |
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C2: feedback cap ; C1:input cap; CL: load cap.
9. Overall considerations:
For an integrator settling error of 0.1% or less, we must have
Ao ≥5000
ωo/ωc ≥4 T/RonC1 ≥40
10.Noise Generated in SC Circuits
(1)Clock feedthrough noise
(2)Noise coupled directly or capacitive from the power, clock, ground lines, and from the substrate.
14-72 CHUNG-YU WU
(3) Thermal and flicker ( 1 f ) noise generated in the switches and op-amps.
Thermal and flicker ( 1 f ) noise:
* Internal sampling and holding=>If 1 |
f |
noise has no |
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aliasing=>It can be eliminated. |
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*Thermal noise will be sampled and held with the OP AMP as a frequency limiting element.=> ωo>>ωc is not suitable.
*The circuit noise ↓ if the circuit cap. ↑
15-1 CHUNG-YU WU
CH 15. Continuous-Time Filters in CMOS
§15-1 Categories of continuous-time filter ICs
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Amplifier Types |
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Continuous-Time Filter Types |
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Voltage OP AMP AV |
Ο |
(Voltage-mode) Active RC filters |
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Current OP AMP AI |
∆ |
(Current-mode) Active RC filters |
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Finite-gain voltage amp |
∆ |
(Voltage-mode) Active RC filters |
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Finite-gain current amp. |
• |
(Current-mode) Active RC filters |
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Infinite-gain Operational Transconductance |
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× |
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Amp. (OTA) Gm |
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Finite-gain OTA or gm amplifier |
Ο |
(Voltage-mode) Gm-C filters |
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Infinite-gain Operational Transimpedance |
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Amp. Rm |
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Finite-gain Transimpedance Amp. or Rm |
∆ |
(Current-mode) Rm-C filters |
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amplifier |
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Mixed Gm and Rm Amplifiers |
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Mixed AV, AI, Gm, and Rm Amplifiers |
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RF amplifier |
∆ |
Integrated LC filters |
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Ο: well developed
∆: less developed but with great potential
• : much less developed × : not explored
? : to be developed with potential
Common characteristics of continuous-time filters: 1. Not parasitic free
=>Greater tolerance in performance. 2. No switches or clocks
=>Lower noise (clock-induced) or simpler circuit.
3. Need tuning to accommodate the process variations on filter characteristics if high accuracy is required. =>Extra overhead and higher cost.
=>Might not be needed if process-independent design is used and reasonable tolerance is allowed.
15-3 CHUNG-YU WU
(c) Feedback amplifier |
(d) Noninverting feedback amplifier |
(e) Buffered amplifier |
(f) Buffered VCVC feedback |
(g) All OTA amplifiers
15-4 CHUNG-YU WU
2.Controlled impedance elements
1
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2 |
(a) Single-ended voltage |
(b) Floating VVR |
variable resistor (VVR) |
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(c) Scaled VVR |
(d) Voltage variable impedance inverter |
(e) Voltage variable floating impedance
(f) Impedance multiplier
15-5 YU WU
(f) Super inductor
(f)FDNR
(d)Variable Impedance Inverter (VIC) or Gyrator
*ZL is a capacitor=> Zin is a inductor=>active inductor.
*Can be used in voltage-controlled oscillator (VCO)
(h) FDNR (Frequency Dependent Negative Resistance)
S=jω |
Zin(jω)= |
R |
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ω2 |
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* Gyrator +super inductor. |
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3. Integrators |
Gm or OTA + R or C |
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(a) Simple |
(b) Lossy |
g