11-23
CHUNG-YU WU
Differential and Integral linearity distribution of two kinds of layout methods for each current source.
|
Linearity Error |
4-Cell Unit(%) |
5-Cell Unit(%) |
|
|
1/2 LSB |
28.6 |
21.4 |
|
|
1 LSB |
82.1 |
67.9 |
|
|
2 LSB |
93.9 |
89.3 |
|
|
Characteristics of the D/A converter. |
|
||
|
|
|
|
|
Resolution |
|
10 bits |
|
|
Differential Nonlinearity |
0.21 LSB |
|
||
Integral Nonlinearity |
0.23 LSB |
|
||
Conversion rate |
|
125 MS/s |
|
|
Settling Time (±1/2 LSB) |
8 ns |
|
||
Rise/Fall time (10-90%) |
3 ns |
|
||
Glitch Energy |
|
40 psV |
|
|
Power Dissipation |
|
150 mWatts |
|
|
Supply Voltage |
|
5V |
|
|
Process |
|
0.8um CMOS |
|
|
Chip Size (without pads) |
1.8mm×1.0mm |
|
||
|
|
|
|
|
SUMMARY
1.Using threshold-voltage compensated current sources.
2.Two-step weighted current array 32 master, 32 slave unit current sources.
3.10 bits, 125MHz, INL±0.21 LSB, DNL±0.23 LSB,
150mW.
4. Few analog components & good performance.
11-24
CHUNG-YU WU
§11-4 Thermometer-Code DAC
Current-mode thermometer-coded DAC; Current-cell-matrix DAC
1. Thermometer code (3 bit) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||||||||||||||||||||
b2 |
b1 |
b0 |
|
|
|
|
|
|
d6 d5 |
|
d4 |
d3 |
d2 |
d1 |
|
|
d0 |
|||||||||||||||||||||||||||
0 |
0 |
|
0 |
|
|
|
→ 0 0 0 0 0 0 0 |
|||||||||||||||||||||||||||||||||||||
0 |
0 |
|
1 |
|
|
|
→ 0 |
0 |
0 |
0 |
|
|
|
0 |
|
|
|
0 |
1 |
|
|
|
|
|
||||||||||||||||||||
0 |
1 |
|
0 |
|
|
|
→ 0 |
0 |
0 |
0 |
|
|
|
0 |
|
|
|
1 |
1 |
|
|
|
|
|
||||||||||||||||||||
|
. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
1 |
1 |
|
0 |
|
|
|
→ 0 |
1 |
1 |
1 |
|
|
|
1 |
|
|
|
1 |
1 |
|
|
|
|
|
||||||||||||||||||||
1 |
1 |
|
1 |
|
|
|
→ 1 |
1 |
1 |
1 |
|
|
|
1 |
|
|
|
1 |
1 |
|
|
|
|
|
||||||||||||||||||||
2. Conceptual circuit of thermometer-coded DAC |
|
|
|
|
|
|
|
|
|
|||||||||||||||||||||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VDD |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Vout,p |
|
|
|
|
|
|
|
|
|
|
Vout,n |
|
|
|
|
|
|
|
|
|
|
|
||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Binary |
1 |
2 |
3 |
1024 |
|
input |
|||||
|
|
|
|
Binary-to-thermometer decoder 10
+50% |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
Tolerance |
|
|
|
|
|
|
|
|
|
|
|
|
|
4X |
|
4 LSB |
|||
-50% |
|
|
|
|
|
|
|
|
|
one step |
|
||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
1 LSB |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1 SWITCH |
4 SWITCHES |
|
|||||
Advantages:
(1)Monotonicity is guaranteed.
(2)The matching requirement is much relaxed.
e.g. 50% matching→DNL 0.5 LSB
(3)At the midcode transition the glitch is greatly reduced.
only 1 LSB current source is switched.
11-25
CHUNG-YU WU
(4)Glitches do not contribute much to nonlinearity. Glitches switched LSB
ÞGlitch/LSB constant
ÞGood linearity.
Disadvantage: Area consuming
Every LSB needs a current source, a switch, a decoding circuit, and the binary to thermometer decoder.
3. 8-bit current-mode thermometer-coded DAC
Conceptual architecture
Vdd |
|
R |
|
|
Vout |
4LSB |
LSB |
|
|
2LSB |
|
*The two LSB bits D0 and D1 are fed to two parallel three-stage pipelined latches directly.
*The six MSB bits are fed to the decoders. (D2, -----, D7)
11-29
CHUNG-YU WU
General characteristics/features of current-mode thermometer-coded DAC:
(1)No resistor or capacitor are used.
(2)Require special layout arrangement and complicated switching sequence to reduce the mismatches among current cells in the matrix Þ complicated decoder
(3)Logic circuits and long delay.
(4)Complicated wiring
(5)Large chip area Þ worse matching problem.
(6)Suitable for high-speed (video) and high-resolution (10-bit) CMOS DAC.
Current switching and better matching than resistors.
11-31
CHUNG-YU WU
Block diagram: 8+2 segmentation
Cell circuit
Digital: decoding logic + latch Analog: differential switch +
cascoded current source.
Biasing scheme
Global biasing: common-centroid layout
Local biasing: 4 quadrants
without direct connection between any two quadrants Þ DNL ↓ and INL ↓
11-32
CHUNG-YU WU
Sinewave spectrum for Fs=300MS/s and Fsig=100MHz . SFDR=60dB
SFDR versus Fsig/Fs
SFDR |
Fs(MS/s) |
Fsig(MHz) |
73dB |
100 |
8 |
60dB |
300 |
100 |
51dB |
500 |
240 |