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SDF Annotator Guide

3

Using the SDF File

This chapter describes the following:

■Understanding the SDF File on page 30

■SDF File Conventions on page 31

■OVI SDF Specification Tool Compatibility on page 34

■OVI SDF Specification Version Differences on page 36

■SDF File Keyword Constructs on page 38

■SDF File Examples on page 82

Understanding the SDF File

The SDF file is an ASCII text file that stores the timing data generated by the Verilog family tool. The SDF file can contain either a pre-layout or post-layout timing data.

The timing data in the SDF file is independent of the Verilog family tool and can include the following:

Delays

Timing Checks

Data

Parameters

 

 

 

 

Module path

Setup

Design

Scaling

Device

Hold

Instance

Environmental

Interconnect

Recovery

Type

Technological

Port

Removal

Library

 

Incremental

Skew

 

 

Absolute

Width

 

 

Conditional

Conditional

 

 

Unconditional

Unconditional

 

 

 

 

 

 

January 2001

30

Product Version 3.2

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