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MOSFET Characterization for VLSI Circuit Simulation

333

Consider an infinitesimally small section of the noiseless channel of a MOS transistor of length dy. Let the resistance of this small section be dR and the channel voltage produced by this resistance is dVCS. For a channel current IDS, these are related as

dVCS = IDSdR = −WµsQinv

dVCS dR

(7.139)

 

dy

 

From (7.139) it follows that

dy

 

dR = − WµsQinv

(7.140)

The noise spectral density due to the thermal noise generated by this small resistance dR is given by

 

 

dy

 

 

vn2 = 4kTdR f = −4kT

f

(7.141)

WµsQinv

 

 

 

 

The power spectral density for the elemental noise voltage is from (7.141)

dy

 

dSVC = 4kTdR = −4kT WµsQinv

(7.142)

From this elemental noise voltage, the elemental noise current power spectral density is

dSID = gC2 dSVC

(7.143)

The conductance for the elemental channel segment is determined as follows:

 

 

 

 

 

 

 

VDS

 

 

 

 

 

 

 

dIDS

 

d

 

W

 

 

 

 

W

 

 

gC =

 

 

= −

 

L

s

Qinv (VCS )dVCS

= −s L

Qinv

(7.144)

dVCS

dVCS

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

Substituting gc from (7.144) and dSVC

from (7.142) into (7.143), we get

 

 

 

 

W

 

2

 

 

 

dy

= −4kT

µs

 

 

 

dSID

= −

−µs

 

Qinv

4kT

 

 

2

WQinvdy

(7.145)

L

µsWQinv

 

 

 

 

 

 

 

 

L

 

 

 

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Technology Computer Aided Design: Simulation for VLSI MOSFET

Integrating over the entire channel length, the total noise current power spectral density is given by

 

µs

L

µs

 

 

SID = −4kT

L2

QinvW dy = −4kT

L2

QINV

(7.146)

 

 

0

 

 

 

In (7.146), QINV = QinvWL represents the total inversion charge under the gate. The thermal noise power spectral density is often expressed in the following manner, referred to as the Klaassen-Prins equation for thermal noise [19]:

SID =

4kT

g2 (VCS )dVCS

(7.147)

L2 IDS

It is to be noted that (7.146) is used in a BSIM compact model with appropriate substitution of QINV.

7.8.2  Characterization of Flicker Noise in MOS Transistor

The flicker noise in the drain current or gate voltage of a MOS transistor is important to characterize precisely because it deteriorates the signal-to-noise ratio of several analog circuits. It also increases the phase noise of oscillators in RF applications. For proper characterization of flicker noise, the underlying physical mechanism of the flicker noise must be understood. This is briefly discussed below.

7.8.2.1  Physical Mechanisms of Flicker Noise

The conductivity of a conductor due to drift motion of the carriers is given by

σ = qnμ

(7.148)

In (7.148), n represents the carrier concentration, and μ represents the carrier mobility. It appears from (7.148) that any fluctuation in the carrier density or mobility leads to fluctuation of the current flowing through the conductor. There are several different theories for explaining the physical cause of flicker noise. These are broadly classified into three different categories [20]:

(1) carrier density fluctuation model, (2) mobility fluctuation model, and (3) correlated carrier and mobility fluctuation model.

According to the carrier density fluctuation model [20], the flicker noise is caused by random trapping and de-trapping of mobile carriers by the interface traps at the Si-SiO2 interface. The interface traps dynamically exchange

MOSFET Characterization for VLSI Circuit Simulation

335

carriers with the channel causing fluctuation in the surface potentials, giving rise to fluctuation in the inversion charge density. The carrier density fluctuation model is observed to successfully explain the flicker noise spectrum in n-channel MOS transistors. According to the mobility fluctuation model [20], on the other hand, the flicker noise is caused due to fluctuation in the carrier mobility, caused due to phonon scattering. The mobility fluctuation model successfully explains the flicker noise spectrum in p-channel MOS transistor. According to the correlated carrier and mobility fluctuation model [21,22], also referred to as the unified flicker noise model, when an interface trap captures an electron from the inversion layer, it becomes charged and reduces the carrier mobility due to Coulombic scattering. Thus according to this model, both the carrier number and the carrier mobility fluctuate due to trapping and de-trapping of the carriers by the interface traps. The unified model shows good matching with experimental results.

7.8.2.2  Empirical Approach for Characterization of Flicker Noise

The power spectral density of the flicker noise spectrum is given by [21]

SID =

KF IDSAF

(7.149)

f Cox WL

 

 

In (7.149), KF is the flicker noise coefficient, and AF is the flicker noise exponent. The value of the parameter AF lies in the range of 0.5 to 2. The constant KF is proportional to the interface trap density, which is technology-specific. The lack of systematic approach in determining the empirical parameters limits the use of this model. However, two significant observations are made. First, the flicker noise is dominant at low frequency. Because of its dependence on frequency as (1/f), flicker noise is sometimes referred to as the (1/f) noise. At frequencies above 100 MHz, the flicker noise spectrum becomes negligible compared to that of the thermal noise. Second, the flicker noise spectrum reduces as the gate area is increased. Third, for PMOS transistors, it has been found that the value of the flicker noise coefficient is smaller compared to NMOS transistors; therefore, PMOS transistors are used in designing low noise circuits, at least at the first stage.

7.8.2.3  Characterization of Flicker Noise through Physics-Based Model

Consider a section of the channel with width W and length

y. The drain

current is given by

 

IDS = WµsqNξy

(7.150)

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Technology Computer Aided Design: Simulation for VLSI MOSFET

In (7.150), μs is the carrier mobility, q is the electron charge, N is the number of channel carriers per unit area, and ξy is the lateral channel field. Fluctuation of local drain current is given by [21,22]

δIDS

1 δ N

 

1 δµs

 

 

 

 

IDS

= −

 

 

 

±

 

 

 

 

δ

Nt

(7.151)

 

 

 

 

 

N δ Nt

 

µs δ Nt

 

 

 

In (7.151), N = NW y,

Nt = NtW y, where Nt

is the number of occupied

traps per unit area, and N is the inversion carrier density. The ± sign in the mobility term of (7.151) denotes whether the trap is neutral or charged when filled.

Let us first evaluate the first term on the right-hand side of Equation (7.151). The ratio of fluctuations in carrier number to fluctuations in occupied trap number R = δ N/δ Nt is close to unity in strong inversion but assumes a smaller value in other bias conditions. A general expression of R is therefore

written as follows:

 

 

 

 

R =

δ N

= −

Cinv

(7.152a)

 

Cox + Cinv + Cdm + Cit

 

δ Nt

 

In (7.152a), Cinv , Cdm , and Cit are inversion layer, depletion layer, and interface trap capacitances, respectively. A more concise form of R is as follows:

N

 

R = − N + N *

(7.152b)

In (7.152b), N* = (kT/q2 )(Cox + Cdm + Cit ) and the typical value of this quantity is 1–5E10/cm–2.

Let us now evaluate the first term on the right-hand side of Equation (7.151). The carrier mobility is related to the oxide trap density as follows:

1

 

=

1

+

1

+

1

+

1

=

1

+ αsc Nt

(7.153)

µ s

 

 

 

µCit

 

 

µB

µSR

µPh

 

µn

 

In (7.153), µCit = 1/αsc Nt is the mobility limited by Coulombic scattering of the mobile carriers at trapped charges near the Si-SiO2 interface, and µB ,µSR ,µPh

represents the mobility limited by ionized impurity scattering, surface roughness scattering, and phonon scattering, respectively. The scattering coefficient αsc is a function of the local carrier density due to the screening effect as well as the distance of the trap from the interface. From experimental

MOSFET Characterization for VLSI Circuit Simulation

337

results, it has been found that μCit increases with the inversion carrier density due to the screening effect. The relationship is given as follows [23]:

Cit = CO

 

N

(7.154a)

 

Nt

αsc =

1

 

(7.154b)

µCO

N

However, in the original unified mobility model [21,22], the scattering parameter is considered to be independent of the inversion carrier density. The reduction of αsc with an increase of N is understood as follows. As the inversion carrier density increases, the screening length and the scattering cross section due to the screening by minority carriers reduce and hence the scattering parameter increases. In a weak inversion region, screening due to minority carriers becomes less significant compared to that by majority carriers. Because the majority carrier concentration does not change much in the weak inversion region, the scattering cross section remains almost constant with inversion carrier density. Consequently, in the weak inversion region, αsc saturates to a particular value and (7.153b) is no longer valid [23]. By differentiating (7.153) and substituting in (7.151), we arrive at

δIDS

R

 

δ Nt

 

IDS

= −

 

± αscµs

W y

(7.155a)

 

N

 

 

This can be written as

R

 

IDS

δ Nt

 

δIDS = −

 

± αscµs

 

(7.155b)

 

 

N

W y

 

 

The power spectrum density of the local current fluctuation is obtained from (7.155b) as follows:

 

 

IDS

2

R

 

2

 

S IDS

(y, f ) =

 

 

 

 

± αsc s

S Nt (y, f )

(7.156)

 

 

 

 

W y

N

 

 

 

In (7.156), S Nt (y, f ) is the power spectrum density of the fluctuations in the number of occupied traps over the area W y and is given by

S Nt

(y, f ) = Nt (Efn )

kTW

y

(7.157)

γ f

 

 

 

 

 

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Technology Computer Aided Design: Simulation for VLSI MOSFET

In (7.157), Efn is the electron quasi-Fermi level, and γ is the attenuation coefficient of the electron wave function in the oxide. Substituting (7.157) in (7.156), we get

 

 

IDS

2

R

2

 

kTW y

S IDS

(y, f ) =

 

 

 

 

± αsc s

Nt (Efn )

 

 

 

γ f

 

 

W y

N

 

 

The total drain current noise power spectral density is given as

L

SIDS ( f ) = L12 S IDS (y, f ) ydy

0

(7.158)

(7.159)

Substituting (7.158) in (7.159) and changing the variables of integration by using (7.150), we write

 

qkTIDS s VDS

 

 

 

N 2

R2

 

 

SIDS ( f ) =

 

Nt (Efn )

1

± αsc s

 

 

dV

(7.160a)

2

N

 

γ fL

 

 

 

R

 

 

 

 

0

 

 

 

 

 

 

 

This can be written in a compact way as follows:

 

qkTIDSµs VDS

*

R2

(7.160b)

 

 

 

 

 

SIDS ( f ) =

γ fL2 Nt (Efn )

N dV

 

 

0

 

 

 

In (7.160b), Nt* (Efn ) is the equivalent oxide trap density that produces the same noise power in absence of mobility fluctuations and is given as

*

 

1

± αsc s

N

2

Nt

(Efn ) = Nt (Efn )

 

(7.160c)

 

 

 

 

R

 

In BSIM implementation of the unified noise model, three additional parameters are introduced to fit the noise measurement results:

Nt* (Efn ) = A + BN + CN2

(7.161)

In (7.161), A, B, and C are technology-dependent model parameters. In (7.160b), the integration variable is changed as follows:

 

q2 kTIDSµs

ND

*

 

R2

 

SIDS ( f ) =

 

Nt

(Efn )

N dN

(7.162)

γ fL2Cox

 

 

NS

 

 

 

 

MOSFET Characterization for VLSI Circuit Simulation

339

In (7.162), NS and ND represent the inversion charge density at the source end and drain end, respectively. These can easily be computed from the inversion charge densities formulae discussed earlier for linear, saturation, and subthreshold regions. Without going into the detailed mathematical derivations (lengthy but elementary), the drain current noise power at the three regions of operations are written as follows [6]:

Linear Region

 

 

 

 

 

 

 

 

 

 

SIDS ( f ) =

 

q2 kTIDS s

 

NS + N*

+ B(NS

 

 

Aln

 

 

 

 

 

 

2

 

ND + N

*

 

 

 

mγ fL Cox

 

 

 

 

 

Saturation Region

 

 

 

 

 

 

 

 

SIDS ( f ) =

q2 kTIDS s

 

NS + N*

+ B(NS

 

Aln

 

 

 

 

2

 

ND + N

*

 

mγ fL Cox

 

 

 

 

 

 

1

 

 

 

ND ) +

C(NS2

ND2 )

(7.163a)

2

 

 

 

 

ND ) + 21 C(NS2 ND2 )

+ L

kTIDS2

 

A + BND + CND2

 

(7.163b)

γ f WL2

 

(ND + N* )2

 

 

 

In (7.163a) and (7.163b), NS and ND are evaluated as follows:

 

 

 

 

qNS = Cox (VGS VT )

(7.163c)

 

 

 

qND = Cox (VGS VT mVDSsat )

(7.163d)

In (7.163b), the second term in the flicker noise power spectrum density estimates the noise arising in the velocity saturation region. In the subthreshold

region,itisreasonabletoassumethat N N* and Nt* (Efn ) = A + BN + CN2 A. Thus the flicker noise power in the subthreshold region is simplified to [6]

AkTI2

SIDS ( f ) = γ DS*2 (7.163e)

WL fN

7.8.3  Simulation Results and Discussion

This section presents simulation results of drain current noise spectra and input referred noise voltage of n-channel MOS transistors and p-channel MOS transistors using HSPICE, utilizing 65-nm PTM technology. The

340

Technology Computer Aided Design: Simulation for VLSI MOSFET

Drain Current Noise (A2/Hz)

10–12

 

VDS = 0.4 V, VGS = 0.2 V, VT = 0.453 V

10–13

 

VDS = 50 mV, VGS = 0.6 V, VT = 0.465 V

 

VDS = 0.8 V, VGS = 0.6 V, VT = 0.439 V

10–14

 

 

10–15

 

 

10–16

 

 

10–17

 

 

10–18

 

 

10–19

 

 

10–20

 

 

10–21

 

 

10–22

 

 

10–23

 

 

10–24

 

 

10–25

 

 

1

10

100 1 k 10 k 100 k 1 M 10 M 100 M 1 G

 

 

Frequency (Hz)

FIGURE 7.35

Drain current noise power spectrum of an n-channel MOS transistor, operating at three different regions of operations.

channel length and width of the transistor in all cases are taken to be 65 nm and 10 µm, respectively. The model selector flags are fnoimod = 1 and tnoimod = 1. Figure 7.35 shows a typical drain current noise spectrum measured in three different regions of operations for an n-channel MOS transistor. It is observed that noise spectrum shows 1/fk dependency with the exponential factor k close to unity. This is consistent with the assumption regarding the uniform spatial distribution of the oxide traps near the interface. It is observed that in the weak inversion region, the drain current noise of the transistor is lower compared to that in the strong inversion region. This is explained by the fact that noise power spectrum is directly proportional to the drain current, and in the weak inversion region the drain current is very small. The measured drain current noise power at 100 Hz is plotted as a function of gate bias for three different drain biases in Figure 7.36(a). The bias dependence of the input referred noise power is plotted in Figure 7.36(b). At the measured frequency, the thermal noise is negligible compared with the flicker noise. It is observed that the dependence of input referred noise power on the bias point is not significant in both linear and saturation regions. The short channel behavior and DIBL effects are also reflected in the noise power spectrum. The corresponding simulation results for a p-channel MOS transistor are shown in Figures 7.37 and 7.38(a),(b). It is observed that the p-channel transistor has a noise level lower than the n-channel MOS

MOSFET Characterization for VLSI Circuit Simulation

341

 

10–12

 

10–13

 

10–14

/Hz)

10–15

10–16

(A

10–17

2

 

Noise

10–18

 

Current

10–19

10–20

 

Drain

10–21

10–22

 

10–23

10–24

10–25

0.0 0.1

 

10–8

/Hz)

10–9

2

 

Noise(V

10–10

Referred

 

Input

10–11

 

Frequency = 100 Hz

 

VDS = 0.8 V, VT = 0.439 V

 

 

VDS = 0.4 V, VT = 0.453 V

 

 

 

 

 

 

VDS = 50 mV, VT = 0.465 V

 

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

VGS (V)

(a)

 

Frequency = 100 Hz

VDS = 0.8 V, VT = 0.439 V

 

 

VDS = 0.4 V, VT = 0.453 V

 

VDS = 50 mV, VT = 0.465 V

10–12

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

VGS (V)

(b)

FIGURE 7.36

(a) Bias dependence of drain current noise power of an n-channel MOS transistor. (b) Bias dependence of input referred noise power of an n-channel MOS transistor.

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Technology Computer Aided Design: Simulation for VLSI MOSFET

Drain Current Noise (A2/Hz)

10–14

VSD = 0.4 V, VSG = 0.2 V, |VT| = 0.395 V

10–15

VSD = 50 mV, VSG = 0.6 V, |VT| = 0.410 V

VSD = 0.8 V, VSG = 0.6 V, |VT| = 0.379 V

10–16

10–17

10–18

10–19

10–20

10–21

10–22

10–23

10–24

10–25

10–26

10–27

1 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G Frequency (Hz)

FIGURE 7.37

Drain current noise power spectrum of a p-channel MOS transistor, operating at three different regions of operations.

Drain Current Noise (A2/Hz)

10–12

Frequency = 100 Hz

VSD = 0.8 V, |VT| = 0.379 V

10–13

 

VSD = 0.4 V, |VT| = 0.395 V

10–14

 

VSD = 50 mV, |VT| = 0.410 V

10–15

 

 

 

 

10–16

 

 

10–17

 

 

10–18

 

 

10–19

 

 

10–20

 

 

10–21

 

 

10–22

 

 

10–23

 

 

10–24

 

 

10–25

 

 

10–26

 

 

10–27

 

 

–1.1 –1.0 –0.9 –0.8 –0.7 –0.6 –0.5 –0.4 –0.3 –0.2 –0.1 0.0 VGS (V)

(a)

FIGURE 7.38

(a) Bias dependence of drain current noise power of a p-channel MOS transistor. (b) Variation of input referred noise spectrum for PMOS transistor operating in the subthreshold region. (continued)