- •1 Features
- •2 Applications
- •3 Description
- •Table of Contents
- •4 Revision History
- •5 Device Family
- •6 Pin Configuration and Functions
- •7 Specifications
- •7.1 Absolute Maximum Ratings
- •7.2 Handling Ratings
- •7.3 Recommended Operating Conditions
- •7.4 Thermal Information
- •7.5 Electrical Characteristics
- •7.6 Timing Requirements
- •7.7 Typical Characteristics
- •8 Parametric Measurement Information
- •8.1 Timing Diagrams
- •9 Detailed Description
- •9.1 Overview
- •9.2 Functional Block Diagram
- •9.3 Feature Description
- •9.3.1 Analog Input
- •9.3.2 Power Saving
- •9.3.3 Digital Output
- •9.3.4 SCLK Input
- •9.4 Device Functional Modes
- •9.4.1 CS Mode for a 3-Wire Interface
- •9.4.1.1 3-Wire CS Mode Without a Busy Indicator
- •9.4.1.2 3-Wire CS Mode With a Busy Indicator
- •9.4.2 CS Mode for a 4-Wire Interface
- •9.4.2.1 4-Wire CS Mode Without a Busy Indicator
- •9.4.2.2 4-Wire CS Mode With a Busy Indicator
- •9.4.3 Daisy-Chain Mode
- •9.4.3.1 Daisy-Chain Mode Without a Busy Indicator
- •9.4.3.2 Daisy-Chain Mode With a Busy Indicator
- •10 Application and Implementation
- •10.1 Application Information
- •10.1.1 ADC Reference Driver
- •10.1.1.1 Reference Driver Circuit
- •10.1.2 ADC Input Driver
- •10.1.2.1 Input Amplifier Selection
- •10.1.2.2 Antialiasing Filter
- •10.2 Typical Application
- •10.2.1 Design Requirements
- •10.2.2 Detailed Design Procedure
- •10.2.3 Application Curve
- •11 Power-Supply Recommendations
- •12 Layout
- •12.1 Layout Guidelines
- •12.2 Layout Example
- •13 Device and Documentation Support
- •13.1 Documentation Support
- •13.1.1 Related Documentation
- •13.2 Trademarks
- •13.3 Electrostatic Discharge Caution
- •13.4 Glossary
- •14 Mechanical, Packaging, and Orderable Information
ADS8339
SBAS677A –JUNE 2014–REVISED OCTOBER 2014 |
www.ti.com |
Feature Description (continued)
9.3.3 Digital Output
As discussed in the Description and Timing Diagrams sections, the device digital output is SPI-compatible. Table 1 lists the output codes corresponding to various analog input voltages.
Table 1. Output Codes
DESCRIPTION |
ANALOG VALUE (V) |
DIGITAL OUTPUT |
STRAIGHT BINARY |
|
|
BINARY CODE |
HEX CODE |
Full-scale range |
Vref |
— |
— |
Least significant bit (LSB) |
Vref / 65536 |
— |
— |
Positive full-scale |
+Vref – 1 LSB |
1111 1111 1111 1111 |
FFFF |
Mid-scale |
Vref / 2 |
1000 0000 0000 0000 |
8000 |
Mid-scale – 1 LSB |
Vref / 2 – 1 LSB |
0111 1111 1111 1111 |
7FFF |
Zero |
0 |
0000 0000 0000 0000 |
0000 |
9.3.4 SCLK Input
The device uses SCLK for the serial data output. Data are read after the conversion is complete and the device is in acquisition phase. A free-running SCLK can be used, but TI recommends stopping the clock during conversion time because the clock edges can couple with the internal analog circuit that, in turn, can affect the conversion results.
9.4 Device Functional Modes
The ADS8339 supports three interface options. Under each option, the device can be used with or without a busy indicator.
1.CS mode for a 3-wire interface (with or without a busy indicator): This mode is useful for applications where a single ADS8339 device is connected to the digital host.
2.CS mode for a 4-wire interface (with or without a busy indicator): This mode can be used when more than one ADS8339 device is connected to the digital host on a common data bus.
3.Daisy-chain mode (with or without a busy indicator): This mode is provided to connect multiple ADS8339 devices in a chain (such as a shift register) and is useful when reducing the number of signal traces on the board or the component count.
The busy indicator is generated as the bit preceding the 16-bit serial data.
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