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ADS8339

SBAS677A –JUNE 2014–REVISED OCTOBER 2014

www.ti.com

Feature Description (continued)

9.3.3 Digital Output

As discussed in the Description and Timing Diagrams sections, the device digital output is SPI-compatible. Table 1 lists the output codes corresponding to various analog input voltages.

Table 1. Output Codes

DESCRIPTION

ANALOG VALUE (V)

DIGITAL OUTPUT

STRAIGHT BINARY

 

 

BINARY CODE

HEX CODE

Full-scale range

Vref

Least significant bit (LSB)

Vref / 65536

Positive full-scale

+Vref – 1 LSB

1111 1111 1111 1111

FFFF

Mid-scale

Vref / 2

1000 0000 0000 0000

8000

Mid-scale – 1 LSB

Vref / 2 – 1 LSB

0111 1111 1111 1111

7FFF

Zero

0

0000 0000 0000 0000

0000

9.3.4 SCLK Input

The device uses SCLK for the serial data output. Data are read after the conversion is complete and the device is in acquisition phase. A free-running SCLK can be used, but TI recommends stopping the clock during conversion time because the clock edges can couple with the internal analog circuit that, in turn, can affect the conversion results.

9.4 Device Functional Modes

The ADS8339 supports three interface options. Under each option, the device can be used with or without a busy indicator.

1.CS mode for a 3-wire interface (with or without a busy indicator): This mode is useful for applications where a single ADS8339 device is connected to the digital host.

2.CS mode for a 4-wire interface (with or without a busy indicator): This mode can be used when more than one ADS8339 device is connected to the digital host on a common data bus.

3.Daisy-chain mode (with or without a busy indicator): This mode is provided to connect multiple ADS8339 devices in a chain (such as a shift register) and is useful when reducing the number of signal traces on the board or the component count.

The busy indicator is generated as the bit preceding the 16-bit serial data.

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