TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720

Floating-Point Digital Signal Processors

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SPRS370C–SEPTEMBER 2006–REVISED OCTOBER 2007

4.17 External Clock Input From Oscillator or CLKIN Pin

The C672x device includes two choices to provide an external clock input, which is fed to the on-chip PLL to generate high-frequency system clocks. These options are illustrated in Figure 4-42.

∙Figure 4-42 (a) illustrates the option that uses an on-chip 1.2-V oscillator with external crystal circuit.

∙Figure 4-42 (b) illustrates the option that uses an external 3.3-V LVCMOS-compatible clock input with the CLKIN pin.

Note that the two clock inputs are logically combined internally before the PLL so the clock input that is not used must be tied to ground.

Figure 4-42. C672x Clock Input Options

If the on-chip oscillator is chosen, then the recommended component values for Figure 4-42 (a) are listed in Table 4-40.

Table 4-40. Recommended On-Chip Oscillator Components

(1)Capacitors C5 and C6 are used to reduce oscillator jitter, but are optional. If C5 and C6 are not used, then the node connecting capacitors C7 and C8 should be tied to OSCVSS and OSCVDD should be tied to CVDD.