Fundamentals of Microelectronics

Compared to the simple CE stage of Fig. 9.16(a), the cascode amplifier exhibits a gain that is higher by a factor of gm1(rO1jjr 2)—a relatively large value because rO1 and r 2 are much greater than 1=gm1.

Example 9.9

The bipolar cascode of Fig. 9.16(b) is biased at a current of 1 mA. If VA = 5 V and = 100 for both transistors, determine the voltage gain. Assume the load is an ideal current source.

Solution

Exercise

What Early voltage gives a gain of 5,000?

It is possible to view the cascode amplifier as a common-emitter stage followed by a commonbase stage. Illustrated in Fig. 9.18, the idea is to consider the cascode device, Q2, as a commonbase transistor that senses the small-signal current produced by Q1. This perspective may prove

useful in some cases.

VCC

I 1

Figure 9.18 Cascode amplifier as a cascade of a CE stage and a CB stage.

The high voltage gain of the cascode topology makes it attractive for many applications. But, in the circuit of Fig. 9.16(b), the load is assumed to be an ideal current source. An actual current source lowers the impedance seen at the output node and hence the voltage gain. For example, the circuit illustrated in Fig. 9.19(a) suffers from a low gain because the pnp current source introduces an impedance of only rO3 from the output node to ac ground, dropping the output impedance to

Figure 9.19 (a) Cascode with a simple current-source load, (b) use of cascode in the load to raise the voltage gain.

How should we realize the load current source to maintain a high gain? We know from Section 9.1.1 that cascoding also raises the output impedance of current sources, postulating that the circuit of Fig. 9.5 is a good candidate and arriving at the stage depicted in Fig. 9.19(b). The output impedance is now given by the parallel combination of those of the npn and pnp cascodes, Ron and Rop, respectively. Using (9.7), we have

Note that, since npn and pnp devices may display different Early voltages, rO1 (= rO2) may not be equal to rO3 (= rO4) .

Recognizing that the short-circuit transconductance, Gm, of the stage is still approximately equal to gm1 (why?), we express the voltage gain as

This result represents the highest voltage gain that can be obtained in a cascode stage. For comparable values of Ron and Rop, this gain is about half of that expressed by (9.53).

Example 9.10

Suppose the circuit of Example 9.9 incorporates a cascode load using pnp transistors with VA = 4 V and = 50. What is the voltage gain?

Solution

The load transistors carry a collector current of approximately 1 mA. Thus,

Sec. 9.1 Cascode Stage 433

It follows that

Compared to the ideal current source case, the gain has fallen by approximately a factor of 3 because the pnp devices suffer from a lower Early voltage and .

Exercise

Repeat the above example for a collector bias current of 0.5 mA.

It is important to take a step back and appreciate our analysis techniques. The cascode of Fig. 9.19(b) proves quite formidable if we attempt to replace each transistor with its small-signal model and solve the resulting circuit. Our gradual approach to constructing this stage reveals the role of each device, allowing straightforward calculation of the output impedance. Moreover, the lemma illustrated in Fig. 9.14 utilizes our knowledge of the output impedance to quickly provide the voltage gain of the stage.

CMOS Cascode Amplifier The foregoing analysis of the bipolar cascode amplifier can readily be extended to the CMOS counterpart. Depicted in Fig. 9.20(a) with an ideal current-source

Figure 9.20 (a) MOS cascode amplifier, (b) realization of load by a PMOS cascode.

load, this stage also provides a short-circuit transconductance Gm gm1 if 1=gm2 rO1. The output resistance is given by (9.22), yielding a voltage gain of

In other words, compared to a simple common-source stage, the voltage gain has risen by a factor of gm2rO2 (the intrinsic gain of the cascode device). Since and r are infinite for MOS devices (at low frequencies), we can also utilize (9.53) to arrive at (9.69). Note, however, that M1 and

M2 need not exhibit equal transconductances or output resistances (their widths and lengths need not be the same) even though they carry equal currents (why?).

As with the bipolar counterpart, the MOS cascode amplifier must incorporate a cascode PMOS current source so as to maintain a high voltage gain. Illustrated in Fig. 9.20(b), the circuit exhibits the following output impedance components:

pCox = 50 A=V2, n = 0:1 V,1 and p = 0:15 V,1, determine the voltage gain.

Solution

With the particular choice of device parameters here, gm1 = gm2, rO1 = rO2, gm3 = gm4, and rO3 = rO4. We have

Exercise

Explain why a lower bias current results in a higher output impedance in the above example. Calculate the output impedance for a drain current of 0.25 mA.

9.2 Current Mirrors

9.2.1 Initial Thoughts

The biasing techniques studied for bipolar and MOS amplifiers in Chapters 4 and 6 prove inadequate for high-performance microelectronic circuits. For example, the bias current of CE and CS stages is a function of the supply voltage—a serious issue because in practice, this voltage experiences some variation. The rechargeable battery in a cellphone or laptop computer, for example, gradually loses voltage as it is discharged, thereby mandating that the circuits operate properly across a range of supply voltages.

Another critical issue in biasing relates to ambient temperature variations. A cellphone must maintain its performance at ,20 C in Finland and +50 C in Saudi Arabia. To understand how temperature affects the biasing, consider the bipolar current source shown in Fig. 9.21(a), where

Figure 9.21 Impractical biasing of (a) bipolar and (b) MOS current sources.

R1 and R2 divide VCC down to the required VBE. That is, for a desired current I1, we have

where the base current is neglected. But, what happens if the temperature varies? The left-hand side remains constant if the resistors are made of the same material and hence vary by the same percentage. The right-hand side, however, contains two temperature-dependent parameters: VT = kT=q and IS. Thus, even if the base-emitter voltage remains constant with temperature, I1 does not.

A similar situation arises in CMOS circuits. Illustrated in Fig. 9.21(b), a MOS current source biased by means of a resistive divider suffers from dependence on VDD and temperature. Here,

436 Chap. 9 Cascode Stages and Current Mirrors

Since both the mobility and the threshold voltage vary with temperature, I1 is not constant even if VGS is.

In summary, the typical biasing schemes introduced in Chapters 4 and 6 fail to establish a constant collector or drain current if the supply voltage or the ambient temperature are subject to change. Fortunately, an elegant method of creating supplyand temperature-independent voltages and currents exists and appears in almost all microelectronic systems. Called the “bandgap reference circuit” and employing several tens of devices, this scheme is studied in more advanced books [1].

The bandgap circuit by itself does not solve all of our problems! An integrated circuit may incorporate hundreds of current sources, e.g., as the load impedance of CE or CS stages to achieve a high gain. Unfortunately, the complexity of the bandgap prohibits its use for each current source in a large integrated circuit.

Let us summarize our thoughts thus far. In order to avoid supply and temperature dependence, a bandgap reference can provide a “golden current” while requiring a few tens of devices. We must therefore seek a method of “copying” the golden current without duplicating the entire bandgap circuitry. Current mirrors serve this purpose.

Figure 9.22 conceptually illustrates our goal here. The golden current generated by a bandgap reference is “read” by the current mirror and a copy having the same characteristics as those of IREF is produced. For example, Icopy = IREF or 2IREF .

VCC

I REF

I copy

Current Mirror

Figure 9.22 Concept of current mirror.

9.2.2 Bipolar Current Mirror

Since the current source generating Icopy in Fig. 9.22 must be implemented as a bipolar or MOS transistor, we surmise that the current mirror resembles the topology shown in Fig. 9.23(a), where Q1 operates in the forward active region and the black box guarantees Icopy = IREF regardless of temperature or transistor characteristics. (The MOS counterpart is similar.)

of current, (c) bipolar current mirror.

How should the black box of Fig. 9.23(a) be realized? The black box generates an output voltage, VX (= VBE), such that Q1 carries a current equal to IREF :

where Early effect is neglected. Thus, the black box satisfies the following relationship:

We must therefore seek a circuit whose output voltage is proportional to the natural logarithm of its input, i.e., the inverse function of bipolar transistor characteristics. Fortunately, a single diode-connected device satisfies (9.87). Neglecting the base-current in Fig. 9.23(b), we have

IS;REF = IS1, i.e., if QREF is identical to Q1.

Figure 9.23(c) consolidates our thoughts, displaying the current mirror circuitry. We say Q1 “mirrors” or copies the current flowing through QREF . For now, we neglect the base currents. From one perspective, QREF takes the natural logarithm of IREF and Q1 takes the exponential of VX, thereby yielding Icopy = IREF . From another perspective, since QREF and Q1 have equal base-emitter voltages, we can write

which reduces to Icopy = IREF if QREF and Q1 are identical. This holds even though VT and IS vary with temperature. Note that VX does vary with temperature but such that Icopy does not.

Example 9.12

An electrical engineering student who is excited by the concept of the current mirror constructs the circuit but forgets to tie the base of QREF to its collector (Fig. 9.24). Explain what happens.

Figure 9.24

Solution

The circuit provides no path for the base currents of the transistors. More fundamentally, the base-emitter voltage of the devices is not defined. The lack of the base currents translates to

Icopy = 0.

Exercise

What is the region of operation of QREF ?

Example 9.13

Realizing the mistake in the above circuit, the student makes the modification shown in Fig. 9.25, hoping that the battery VX provides the base currents and defines the base-emitter voltage of QREF and Q1. Explain what happens.

Solution

which is a function of temperature if VX is constant. The student has forgotten that a diodeconnected device is necessary here to ensure that VX remains proportional to ln(IREF =IS;REF ).

Exercise

Suppose VX is slightly greater than the necessary value, VT ln(IREF =IS;REF ). In what region does QREF operate?

We must now address two important questions. First, how do we make additional copies of IREF to feed different parts of an integrated circuit? Second, how do we obtain different values for these copies, e.g., 2IREF , 5IREF , etc.? Considering the topology in Fig. 9.22(c), we recognize that VX can serve as the base-emitter voltage of multiple transistors, thus arriving at the circuit shown in Fig. 9.26(a). The circuit is often drawn as in Fig. 9.26(b) for simplicity. Here, transistor Qj carries a current Icopy;j, given by

Figure 9.26 (a) Multiple copies of a reference current, (b) simplified drawing of (a), (c) combining output currents to generate larger copies.

The key point here is that multiple copies of IREF can be generated with minimal additional complexity because IREF and QREF themselves need not be duplicated.

Equation (9.94) readily answers the second question as well: If IS;j (/ the emitter area of Qj) is chosen to be n times IS;REF (/ the emitter area of QREF ), then Icopy;j = nIREF . We say the copies are “scaled” with respect to IREF . Recall from Chapter 4 that this is equivalent to placing n unit transistors in parallel. Figure 9.26(c) depicts an example where Q1-Q3 are identical to QREF , providing Icopy = 3IREF .

Example 9.14

A multistage amplifier incorporates two current sources of values 0.75 mA and 0.5 mA. Using a bandgap reference current of 0.25 mA, design the required current sources. Neglect the effect of the base current for now.

Solution

Figure 9.27 illustrates the circuit. Here, all transistors are identical to ensure proper scaling of

IREF .

Figure 9.27

Exercise

Repeat the above example if the bandgap reference current is 0.1 mA.

The use of multiple transistors in parallel provides an accurate means of scaling the reference in current mirrors. But, how do we create fractions of IREF ? This is accomplished by realizing QREF itself as multiple parallel transistors. Exemplified by the circuit in Fig. 9.28, the idea is

X Q 1

Q REF1 Q REF2 Q REF3

Figure 9.28 Copying a fraction of a reference current .

to begin with a larger IS;REF (= 3IS here) so that a unit transistor, Q1, can generate a smaller current. Repeating the expressions in (9.89) and (9.90), we have

Example 9.15

It is desired to generate two currents equal to 50 A and 500 A from a reference of 200 A. Design the current mirror circuit.

Solution

To produce the smaller current, we must employ four unit transistors for QREF such that each carries 50 A. A unit transistor thus generates 50 A (Fig. 9.29). The current of 500 A requires 10 unit transistors, denoted by 10AE for simplicity.

Figure 9.29