Fundamentals of Microelectronics

68.Design the circuit of Fig. 7.90 such that M1 operates 100 mV away from the triode region while providing a voltage gain of 4. Assume a power budget of 2 mW.

VDD = 1.8 V

RD

Vout

M 1

Vin

RS

Figure 7.90

69. Figure 7.91 shows a self-biased common-gate stage, where RG 10RD and CG serves as a

Figure 7.91

low impedance so that the voltage gain is still given by gmRD. Design the circuit for a power budget of 5 mW and a voltage gain of 5. Assume RS 10=gm so that the input impedance remains approximately equal to 1=gm.

70. Design the CG stage shown in Fig. 7.92 such that it can accommodate an output swing of 500

VDD = 1.8 V

Figure 7.92

mVpp, i.e., Vout can fall below its bias value by 250 mV without driving M1 into the triode region. Assume a voltage gain of 4 and an input impedance of 50 . Select RS 10=gm and R1 + R2 = 20 k . (Hint: since M1 is biased 250 mV away from the triode region, we

have RSID + VGS , VTH + 250 mV = VDD , IDRD.)

71.Design the source follower depicted in Fig. 7.93 for a voltage gain of 0.8 and a power budget of 2 mW. Assume the output dc level is equal to VDD=2 and the input impedance exceeds 10 k .

72.Consider the source follower shown in Fig. 7.94. The circuit must provide a voltage gain of

VDD = 1.8 V

R G

VinM 1

Vout

RS

Figure 7.93

Figure 7.94

0.8 at 100 MHz while consuming 3 mW. Design the circuit such that the dc voltage at node

X is equal to VDD=2. Assume the input impedance exceeds 20 k .

73.In the source follower of Fig. 7.95, M2 serves as a current source. The circuit must operate

VDD = 1.8 V

VinM 1

Vout

VbM 2

Figure 7.95

with a power budget of 3 mW, a voltage gain of 0.9, and a minimum allowable output of 0.3 V (i.e., M2 must remain in saturation if VDS2 0:3 V). Assuming = 0:1 V,1 for both transistors, design the circuit.

SPICE Problems

In the following problems, use the MOS models and source/drain dimensions given in Appendix A. Assume the substrates of NMOS and PMOS devices are tied to ground and VDD, respectively.

74. In the circuit of Fig. 7.96, I1 is an ideal current source equal to 1 mA.

VDD = 1.8 V

Figure 7.96

(a) Using hand calculations, determine (W=L)1 such that gm1 = (100 ),1.

(b)Select C1 for an impedance of 100 ( 1 k ) at 50 MHz.

(c)Simulate the circuit and obtain the voltage gain and output impedance at 50 MHz..

(d)What is the change in the gain if I1 varies by 20%?

75.The source follower of Fig. 7.97 employs a bias current source, M2.

M 1 VDD = 1.8 V

Vin 20

0.18

Vout

M 2

10

0.8 V

0.18

Figure 7.97

(a)What value of Vin places M2 at the edge of saturation?

(b)What value of Vin places M1 at the edge of saturation?

(c)Determine the voltage gain if Vin has a dc value of 1.5 V.

(d)What is the change in the gain if Vb changes by 50 mV?

76.Figure 7.98 depicts a cascade of a source follower and a common-gate stage. Assume Vb = 1:2 V and (W=L)1 = (W=L)2 = 10 m=0:18 m.

VDD

1 kΩ

1 mA

Figure 7.98

(a)Determine the voltage gain if Vin has a dc value of 1.2 V.

(b)Verify that the gain drops if the dc value of Vin is higher or lower than 1.2 V.

(c)What dc value at the input reduces the gain by 10% with respect to that obtained in (a)?

77.Consider the CS stage shown in Fig. 7.99, where M2 operates as a resistor.

M 2 VDD = 1.8 V

W2

0.18

Vout

Vin 10

0.18

M 1

Figure 7.99

(a)Determine W2 such that an input dc level of 0.8 V yields an output dc level of 1 V. What is the voltage gain under these conditions?

(b)What is the change in the gain if the mobility of the NMOS device varies by 10%? Can you explain this result using the expressions derived in Chapter 6 for the transconductance?

78.Repeat Problem 77 for the circuit illustrated in Fig. 7.100 and compare the sensitivities to the mobility.

VDD = 1.8 V

W2

0.18

M 2

Vout

Vin 10

0.18

M 1

Figure 7.100

Operational Amplifier As A

Black Box

The term “operational amplifier” (op amp) was coined in the 1940s, well before the invention of the transistor and the integrated circuit. Op amps realized by vacuum tubes1 served as the core of electronic “integrators,” “differentiators,” etc., thus forming systems whose behavior followed a given differential equation. Called “analog computers,” such circuits were used to study the stability of differential equations that arose in fields such as control or power systems. Since each op amp implemented a mathematical operation (e.g., integration), the term “operational amplifier” was born.

Op amps find wide application in today's discrete and integrated electronics. In the cellphone studied in Chapter 1, for example, integrated op amps serve as building blocks in (active) filters. Similarly, the analo-to-digital converter(s) used in digital cameras often employ op amps.

In this chapter, we study the operational amplifier as a black box, developing op-amp-based circuits that perform interesting and useful functions. The outline is shown below.

8.1 General Considerations

The operational amplifier can be abstracted as a black box having two inputs and one output. 2 Shown in Fig. 8.1(a), the op amp symbol distinguishes between the two inputs by the plus and minus sign; Vin1 and Vin2 are called the “noninverting” and “inverting” inputs, respectively. We view the op amp as a circuit that amplifies the difference between the two inputs, arriving at the equivalent circuit depicted in Fig. 8.1(b). The voltage gain is denoted by A0:

1Vacuum tubes were amplifying devices consisting of a filament that released electrons, a plate that collected them, and another that controlled the flow—somewhat similar to MOSFETs.

2In modern integrated circuits, op amps typically have two outputs that vary by equal and opposite amounts.

375

Figure 8.1 (a) Op amp symbol, (b) equivalent circuit.

It is instructive to plot Vout as a function of one input while the other remains at zero. With Vin2 = 0, we have Vout = A0Vin1, obtaining the behavior shown in Fig. 8.2(a). The positive slope (gain) is consistent with the label “noninverting” given to Vin1. On the other hand, if Vin1 = 0, Vout = ,A0Vin2 [Fig. 8.2(b)], revealing a negative slope and hence an “inverting” behavior.

Figure 8.2 Op amp characteristics from (a) noninverting and (b) inverting inputs to output.

The reader may wonder why the op amp has two inputs. After all, the amplifier stages studied in Chapters 5 and 7 have only one input node (i.e., they sense the input voltage with respect to ground). As seen throughout this chapter, the principal property of the op amp, Vout = A0(Vin1 , Vin2), forms the foundation for many circuit topologies that would be difficult to realize using an amplifier having Vout = AVin. Amplifier circuits having two inputs are studied in Chapter 10.

How does the “ideal” op amp behave? Such an op amp would provide an infinite voltage gain, an infinite input impedance, a zero output impedance, and infinite speed. In fact, the first-order analysis of an op-amp-based circuit typically begins with this idealization, quickly revealing the basic function of the circuit. We can then consider the effect of the op amp “nonidealities” on the performance.

The very high gain of the op amp leads to an important observation. Since realistic circuits produce finite output swings, e.g., 2 V, the difference between Vin1 and Vin2 in Fig. 8.1(a) is always small:

In other words, the op amp, along with the circuitry around it, brings Vin1 and Vin2 close to each other. Following the above idealization, we may say Vin1 = Vin2 if A0 = 1.

A common mistake is to interpret Vin1 = Vin2 as if the two terminals Vin1 and Vin2 are shorted together. It must be borne in mind that Vin1 , Vin2 becomes only infinitesimally small as A0 ! 1 but cannot be assumed exactly equal to zero.

Example 8.1

The circuit shown in Fig. 8.3 is called a “unity-gain” buffer. Note that the output is tied to the inverting input. Determine the output voltage if Vin1 = +1 V and A0 = 1000.

Figure 8.3 Unity-gain buffer.

Solution

If the voltage gain of the op amp were infinite, the difference between the two inputs would be zero and Vout = Vin; hence the term “unity-gain buffer.” For a finite gain, we write

As expected, the gain approaches unity as A0 becomes large. In this example, A0 = 1000, Vin = 1 V, and Vout = 0:999 V. Indeed, Vin1 , Vin2 is small compared to Vin and Vout.

Exercise

What value of A0 is necessary so that the output voltage is equal to 0.9999?

Op amps are sometimes represented as shown in Fig. 8.4 to explicitly indicate the supply voltages, VEE and VCC. For example, an op amp may operate between ground and a positive supply, in which case VEE = 0.

VCC

Vin1

Vin2

Vout

VEE

Figure 8.4 Op amp with supply rails.

8.2 Op-Amp-Based Circuits

In this section, we study a number of circuits that utilize op amps to process analog signals. In each case, we first assume an ideal op amp to understand the underlying principles and subsequently examine the effect of the finite gain on the performance.

8.2.1 Noninverting Amplifier

Recall from Chapters 5 and 7 that the voltage gain of amplifiers typically depends on the load resistor and other parameters that may vary considerably with temperature or process.3 As a result, the voltage gain itself may suffer from a variation of, say, 20%. However, in some applications (e.g., A/D converters), a much more precise gain (e.g., 2.000) is required. Op-amp- based circuits can provide such precision.

Illustrated in Fig. 8.5, the noninverting amplifier consists of an op amp and a voltage divider that returns a fraction of the output voltage to the inverting input:

R2

Figure 8.5 Noninverting amplifier.

Due to the positive gain, the circuit is called a “noninverting amplifier.”

Interestingly, the voltage gain depends on only the ratio of the resistors; if R1 and R2 increase by 20%, R1=R2 remains constant. The idea of creating dependence on only the ratio of quantities that have the same dimension plays a central role in circuit design.

Example 8.2

Study the noninverting amplifier for two extreme cases: R1=R2 = 1 and R1=R2 = 0.

Solution

If R1=R2 ! 1, e.g., if R2 approaches zero, we note that Vout=Vin ! 1. Of course, as depicted in Fig. 8.6(a), this occurs because the circuit reduces to the op amp itself, with no fraction of the output fed back to the input. Resistor R1 simply loads the output node, with no effect on the gain if the op amp is ideal.

If R1=R2 ! 0, e.g., if R2 approaches infinity, we have Vout=Vin ! 1. Shown in Fig. 8.6(b), this case in fact reduces to the unity-gain buffer of Fig. 8.3 because the ideal op amp draws no current at its inputs, yielding a zero drop across R1 and hence Vin2 = Vout.

3Variation with process means the circuits fabricated in different “batches” exhibit somewhat different characteristics.

Exercise

Suppose the circuit is designed for a nominal gain of 2.00 but the R1 and R2 suffer from a mismatch of 5% (i.e., R1 = (1 0:05)R2). What is the actual voltage gain?

Let us now take into account the finite gain of the op amp. Based on the model shown in Fig. 8.1(b), we write

As expected, this result reduces to (8.9) if A0 R2=(R1 + R2) 1. To avoid confusion between the gain of the op amp, A0, and the gain of the overall amplifier, Vout=Vin, we call the former the “open-loop” gain and the latter the “closed-loop” gain.

Equation (8.11) indicates that the finite gain of the op amp creates a small error in the value of Vout=Vin. If much greater than unity, the term A0R2=(R1 + R2) can be factored from the denominator to permit the approximation (1 + ),1 1 , for 1:

Called the “gain error,” the term (1 + R1=R2)=A0 must be minimized according to each application's requirements.

Example 8.3

A noninverting amplifier incorporates an op amp having a gain of 1000. Determine the gain error if the circuit is to provide a nominal gain of (a) 5, or (b) 50.

Solution

For a nominal gain of 5, we have 1 + R1=R2 = 5, obtaining a gain error of:

In other words, a higher closed-loop gain inevitably suffers from less accuracy.

Exercise

Repeat the above example if the op amp has a gain of 500.

With an ideal op amp, the noninverting amplifier exhibits an infinite input impedance and a zero output impedance. For a nonideal op amp, the I/O impedances are derived in Problem 7.

8.2.2 Inverting Amplifier

Depicted in Fig. 8.7(a), the “inverting amplifier” incorporates an op amp along with resistors R1 and R2 while the noninverting input is grounded. Recall from Section 8.1 that if the op amp gain is infinite, then a finite output swing translates to Vin1 , Vin2 ! 0; i.e., node X bears a zero potential even though it is not shorted to ground. For this reason, node X is called a “virtual

Virtual

Ground

(b)

(a)