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CHAPTER 8

PROGRAMMING WITH THE X87 FPU

The x87 Floating-Point Unit (FPU) provides high-performance floating-point processing capabilities for use in graphics processing, scientific, engineering, and business applications. It supports the floating-point, integer, and packed BCD integer data types and the floating-point processing algorithms and exception handling architecture defined in the IEEE Standard 754 for Binary Floating-Point Arithmetic.

This chapter describes the x87 FPU’s execution environment and instruction set. It also provides exception handling information that is specific to the x87 FPU. Refer to the following chapters or sections of chapters for additional information about x87 FPU instructions and floating-point operations:

Chapter 3, Instruction Set Reference A-M and Chapter 4, Instruction Set Reference N-Z of the IA-32 Intel Architecture Software Developer’s Manual, Volumes 2A & 2B provide detailed descriptions of x87 FPU instructions.

Section 4.2.2, “Floating-Point Data Types”, Section 4.2.1.2, “Signed Integers”, and Section 4.7, “BCD and Packed BCD Integers” describe the floating-point, integer, and BCD data types.

Section 4.9, “Overview of Floating-Point Exceptions”, Section 4.9.1, “Floating-Point Exception Conditions”, and Section 4.9.2, “Floating-Point Exception Priority” give an overview of the floating-point exceptions that the x87 FPU can detect and report.

8.1X87 FPU EXECUTION ENVIRONMENT

The x87 FPU represents a separate execution environment within the IA-32 architecture (see Figure 8-1). This execution environment consists of eight data registers (called the x87 FPU data registers) and the following special-purpose registers:

Status register Control register Tag word register

Last instruction pointer register Last data (operand) pointer register Opcode register

These registers are described in the following sections.

Vol. 1 8-1

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