CHAPTER 7 PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS
General-purpose (GP) instructions are a subset of the IA-32 instructions that represent the fundamental instruction set for the Intel IA-32 processors. These instructions were introduced into the IA-32 architecture with the first IA-32 processors (the Intel 8086 and 8088). Additional instructions were added to the general-purpose instruction set in subsequent families of IA-32 processors (the Intel 286, Intel386, Intel486, Pentium, Pentium Pro, and Pentium II processors).
Intel Extended Memory 64 Technology (Intel EM64T) further extends the capability of most general-purpose instructions so that they are able to handle 64-bit data in 64-bit mode. A small number of general-purpose instructions (still supported in non-64-bit modes) are not supported in 64-bit mode.
General-purpose instructions perform basic data movement, memory addressing, arithmetic and logical, program flow control, input/output, and string operations on a set of integer, pointer, and BCD data types. This chapter provides an overview of the general-purpose instructions. Chapter 3, Instruction Set Reference A-M and Chapter 4, Instruction Set Reference N-Z of the IA-32 Intel Architecture Software Developer’s Manual, Volumes 2A & 2B provide detailed description of each instruction.
7.1PROGRAMMING ENVIRONMENT FOR GP INSTRUCTIONS
The programming environment for the general-purpose instructions consists of the set of registers and address space. The environment includes the following items:
•General-purpose registers — Eight 32-bit general-purpose registers (see Section 3.4.1) are used in non-64-bit modes to address operands in memory. These registers are referenced by the names EAX, EBX, ECX, EDX, EBP, ESI EDI, and ESP.
•Segment registers — The six 16-bit segment registers contain segment pointers for use in accessing memory (see Section 3.4.2). These registers are referenced by the names CS, DS, SS, ES, FS, and GS.
•EFLAGS register — This 32-bit register (see Section 3.4.3) is used to provide status and control for basic arithmetic, compare, and system operations.
•EIP register — This 32-bit register contains the current instruction pointer (see Section 3.4.3).
General-purpose instructions operate on the following data types. The width of valid data types is dependent on processor mode (see Chapter 4):
•
•
Bytes, words, doublewords
Signed and unsigned byte, word, doubleword integers
Vol. 1 7-1
PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS
•
•
•
Near and far pointers Bit fields
BCD integers
7.2PROGRAMMING ENVIRONMENT FOR GP INSTRUCTIONS IN 64-BIT MODE
The programming environment for the general-purpose instructions in 64-bit mode is similar to that described in Section 7.1
•General-purpose registers — In 64-bit mode, sixteen general-purpose registers available. These include the eight GPRs described in Section 7.1 and eight new GPRs (R8D-R15D). R8D-R15D are available by using a REX prefix. All sixteen GPRs can be promoted to 64 bits. The 64-bit registers are referenced as RAX, RBX, RCX, RDX, RBP, RSI, RDI, RSP and R8-R15 (see Section 3.4.1.1). Promotion to 64-bit operand requires REX prefix encodings.
•Segment registers — In 64-bit mode, segmentation is available but it is set up uniquely (see Section 3.4.2.1).
•Flags and Status register — When the processor is running in 64-bit mode, EFLAGS becomes the 64-bit RFLAGS register (see Section 3.4.3).
•Instruction Pointer register — In 64-bit mode, the EIP register becomes the 64-bit RIP register (see Section 3.5.1).
General-purpose instructions operate on the following data types in 64-bit mode. The width of valid data types is dependent on default operand size, address size, or a prefix that overrides the default size:
•
•
•
Bytes, words, doublewords, quadwords
Signed and unsigned byte, word, doubleword, quadword integers Near and far pointers
•Bit fields See also:
•Chapter 3, Basic Execution Environment, for more information about IA-32e modes.
•Chapter 2, IA-32 Intel Architecture Software Developer’s Manual, Volume 2A for more detailed information about REX prefixes.
•IA-32 Intel Architecture Software Developer’s Manual, Volumes 2A & 2B for a complete technical listing of all instructions. This information documents the behavior of individual instructions in the 64-bit mode context.
7-2 Vol. 1