See the discussion in 4.5.15 regarding other restrictions on the usage of analog operators.

5.10 Analog event control statements

The analog behavior of a component can be controlled using events. events have the following characteristics:

—events have no time duration

—events can be triggered and detected in different parts of the behavioral model

—events do not block the execution of an analog block

—events can be detected using the @ operator

—events do not hold any data

—there can be both digital and analog events

There are three types of analog events, global events (5.10.2), monitored events (5.10.3), and named events (5.10.4). Null arguments are not allowed in analog events. Analog event detection consist of an event expression followed by a procedural statement, as shown in Syntax 5-13.

analog_event_functions ::=

cross ( analog_expression [ , analog_expression_or_null

[ , constant_expression_or_null [ , constant_expression_or_null [ , analog_expression ] ] ] ] ) | above ( analog_expression [ , constant_expression_or_null

[ , constant_expression_or_null [ , analog_expression ] ] ] ) | timer ( analog_expression [ , analog_expression_or_null

[ , constant_expression_or_null [ , analog_expression ] ] ] )

| { attribute_instance } ;

Syntax 5-13—Syntax for event detection in analog context

The procedural statements following the event expression is executed whenever the event described by the expression changes. The analog event detection is non-blocking, meaning the execution of the procedural statement is skipped unless the analog event has occurred. The event expression consists of one or more signal names, global events, or monitored events separated by the or operator.

The following restrictions applies to the statements that can be specified within an event control block:

—Analog filter functions cannot be used as part of the event control statement. This statement cannot maintain its internal state since it is only executed intermittently when the corresponding event is triggered

—Contribution statements cannot be used inside an event control block because it can generate discontinuity in analog signals

—Nested event control statements are not allowed

The parentheses around the event expression are required.

Analog events can also be detected within digital blocks. Syntax 5-14 shows the usage of analog event control statements inside digital to monitor analog values in the digital context. The usage of initial_step and final_step analog events are not allowed in the digital context. Refer 7.3.4 for further details on detecting continuous events in a discrete context.

Syntax 5-14—Syntax for analog event detection in digital context

5.10.1 Event OR operator

The “OR-ing” of events indicates the occurrence of any one of the events specified shall trigger the execution of the procedural statement following the event. The keyword or is used as an event OR operator. A comma ( , ) can be used interchangeably with the keyword or to OR event expressions.

Examples:

analog begin

@(initial_step or cross(V(smpl)-2.5,+1)) begin vout = (V(in) > 2.5);

end

V(out) <+ vout; end

Here, initial_step is a global event and cross() returns a monitored event. The variable vout is set to zero (0) or one (1) whenever either event occurs.

5.10.2 Global events

Global events are generated by a simulator at various stages of simulation. The user model cannot generate these events. These events are detected by using the name of the global event in an event expression with the @ operator.

Global events are pre-defined in Verilog-AMS HDL. These events cannot be redefined in a model.

The pre-defined global events are shown in Syntax 5-15.

initial_step and final_step generate global events on the first and the last point in an analysis respectively. They are useful when performing actions which should only occur at the beginning or the end of an analysis. Both global events can take an optional argument, consisting of an analysis list for the active global event.

Examples:

@(initial_step("ac", "dc")) // active for dc and ac only @(initial_step("tran")) // active for transient only

Table 5-1 describes the return value of initial_step and final_step for standard analysis types. Each column shows the return-on-event status. One (1) represents Yes and zero (0) represents No. A Ver-

ilog-AMS HDL simulator can use any or all of these typical analysis types. Additional analysis names can also be used as necessary for specific implementations. (See 4.6.1 for further details.)

Table 5-1—Return value of initial_step and final_step

apX designates frequency/time analysis point X, X = 1 to N; OP designates the Operating Point. bSweep refers to a dc analysis in which a parameter is swept through multiple values and an operating

point analysis is performed for each value. d1 refers to the first point in the sweep; d2 through dN are subsequent points.

The following example measures the bit-error rate of a signal and prints the result at the end of the simulation.

module bitErrorRate (in, ref); input in, ref;

electrical in, ref;

parameter real period=1, thresh=0.5; integer bits, errors;

analog begin @(initial_step) begin

bits = 0; errors = 0;

end

@(timer(0, period)) begin

if ((V(in) > thresh) != (V(ref) > thresh)) errors = errors + 1;

bits = bits + 1; end

@(final_step)

$strobe("bit error rate = %f%%", 100.0 * errors / bits );

end endmodule