
- •Contents
- •Preface
- •Related Documents
- •Typographic and Syntax Conventions
- •Creating HDL Modules for CDBA Cellviews
- •Creating HDL Data as You Save CDBA Cellviews
- •Creating HDL Data from Pre-existing CDBA Cellviews
- •Quick-Start Tutorial
- •The Circuit
- •AMS Designer Tools
- •Setting Up the Tutorial
- •Running from a Script
- •Running within the AMS Environment
- •Opening the Command Interpreter Window
- •Netlisting and Compiling
- •Elaborating and Simulating the Design
- •Summary
- •Setting Up the AMS Environment
- •Overview
- •The hdl.var File
- •The ams.env Files
- •AMS Designer Supports Design Management
- •Specifying the Text Editor to Use
- •Specifying Fonts for the Cadence Hierarchy Editor
- •Preparing to Use AMS Designer from the Hierarchy Editor
- •Netlisting
- •Netlisting Modes Supported by the AMS Netlister
- •Automatic Netlisting of a Cellview
- •Netlist Updating and Netlisting of Entire Designs
- •Netlisting from the UNIX Command Line
- •Library Netlisting
- •Netlisting of Cells in Response to Changes in CDF
- •Preparing Existing Analog Primitive Libraries for Netlisting
- •Specifying the Behavior of the Netlister and Compilers
- •Opening the AMS Options Windows
- •Setting Netlister Options from the Hierarchy Editor
- •Opening the CIW AMS Options Window
- •Setting Compiler Options
- •Viewing the AMS Netlister Log
- •Understanding the Output from the AMS Netlister
- •How Inherited Connections Are Netlisted
- •Inherited Signal Connections
- •Inherited Terminal Connections
- •Instance Values for Inherited Connections
- •Third-Party Tools and Other Cadence Tools
- •How Aliased Signals Are Netlisted
- •How m-factors (Multiplicity Factors) Are Netlisted
- •How Iterated Instances Are Netlisted
- •Passing Model Names as Parameters
- •Effect of the modelname, model, and modelName Parameters
- •Handling of the model* and componentName Parameters
- •Precedence of the model* and componentName Parameters
- •Specifying Parameters to be Excluded from Netlisting
- •Ignoring Parameters for Entire Libraries
- •Example: Specifying Parameters to Ignore
- •Ensuring that Floating Point Parameters Netlist Correctly
- •Working with Schematic Designs
- •Setting Schematic Rules Checker Options for AMS Designer
- •Creating Cellviews Using the AMS Environment
- •Preparing a Library
- •Creating the Symbol View
- •Using Blocks
- •Descend Edit
- •Inherited Connections
- •Global Signals in the Schematic Editor
- •Inherited Connections in a Hierarchy
- •How Net Expressions Evaluate
- •Net and Pin Properties
- •groundSensitivity and supplySensitivity Properties
- •Making Connect Modules Sensitive to Inherited Connection Values
- •Using External Text Designs
- •Overview of Steps for Using External Text Designs
- •Bringing Modules into a Cadence Library
- •Specifying the Working Library
- •Compiling into Libraries
- •Compiling into Temporary Libraries
- •Listing Compiled Modules
- •Using Text Blocks in Schematics
- •Using Modules Located in a Cadence Library
- •Preparing for Simulation
- •Using Analog Primitives
- •Using SPICE and Spectre Netlists and Subcircuits
- •Preparing to Use SPICE and Spectre Netlists and Subcircuits
- •Placing SPICE and Spectre Netlists and Subcircuits in a Schematic
- •Using Test Fixtures
- •Creating and Using a Textual Test Fixture
- •Creating a Textual Test Fixture
- •Using a Test Fixture
- •Example: Creating and Using a Test Fixture
- •Using Design Configurations
- •Ensuring HDL Design Unit Information Is Current
- •Preparing a Design for Simulation
- •Overview of AMS Design Prep
- •What AMS Design Prep Does to Prepare a Design for Simulation
- •When to Use AMS Design Prep
- •Specifying the Behavior of AMS Design Prep
- •Setting Options for Global Design Data
- •Specifying Global Signals
- •Specifying Design Variables
- •Specifying Model Files to Use During Elaboration
- •Running AMS Design Prep
- •The cds_globals Module
- •Global Signals
- •Design Variables
- •Setting Elaborator Options
- •Setting Simulator Options
- •Setting Waveform Selection Options
- •Creating Probes
- •Selecting Instances from the Virtuoso Schematic Editing Window
- •Selecting Buses
- •Selecting Instances from the Scope Navigator
- •Copying and Pasting Within Tables
- •Elaborating and Simulating
- •Viewing Messages
- •Plotting Waveforms After Simulation Ends
- •Starting the SimVision Waveform Viewer
- •Plotting Waveforms Selected on a Schematic (Direct Plot)
- •Using the amsdesigner Command
- •Examples
- •Producing Customized Netlists
- •Producing Customized Netlists
- •Identifying the Sections of a Netlist
- •Using ams.env Variables to Customize Netlists
- •Using Netlisting Procedures to Customize Netlists
- •Examples: Problems Addressed by Customized Netlists
- •Example: Adjusting Parameter Values to Account for Number of Fingers
- •Example: Using Symbols that Represent Verilog Test Code
- •Data Objects Supported for Netlisting
- •Netlister Object
- •Formatter Object
- •Cellview Object
- •Parameter Object
- •Instance Object
- •SKILL Functions Supported for Netlisting
- •Default Netlisting Procedures
- •Netlisting Helper Functions
- •Variables for ams.env Files
- •How AMS Designer Determines the Set of Variables
- •Why AMS Designer Uses ams.env Files, Not .cdsenv Files
- •List of ams.env Variables
- •Detailed Descriptions of ams.env Variables
- •aliasInstFormat
- •allowDeviantBuses
- •allowNameCollisions
- •allowSparseBuses
- •allowUndefParams
- •amsCompMode
- •amsDefinitionViews
- •amsEligibleViewTypes
- •amsExcludeParams
- •amsExpScalingFactor
- •amsLSB_MSB
- •amsMaxErrors
- •amsScalarInstances
- •amsVerbose
- •analogControlFile
- •bindCdsAliasLib
- •bindCdsAliasView
- •cdsGlobalsLib
- •cdsGlobalsView
- •checkAndNetlist
- •checkOnly
- •checktasks
- •compileAsAMS
- •compileExcludeLibs
- •compileMode
- •connectRulesCell
- •connectRulesCell2
- •connectRulesLib
- •connectRulesView
- •detailedDisciplineRes
- •discipline
- •excludeViewNames
- •hdlVarFile
- •headerText
- •ieee1364
- •ifdefLanguageExtensions
- •incdir
- •includeFiles
- •includeInstCdfParams
- •initFile
- •instClashFormat
- •iterInstExpFormat
- •language
- •lexpragma
- •logFileAction
- •logFileName
- •macro
- •maxErrors
- •messages
- •modifyParamScope
- •ncelabAccess
- •ncelabAnnoSimtime
- •ncelabArguments
- •ncelabCoverage
- •ncelabDelayMode
- •ncelabDelayType through ncelabMessages
- •ncelabMixEsc
- •ncelabModelFilePaths
- •ncelabNeverwarn through ncelabVipdelay
- •ncsimArguments
- •ncsimEpulseNoMsg through ncsimExtassertmsg
- •ncsimGUI
- •ncsimLoadvpi through ncsimStatus
- •ncsimTcl
- •ncsimUnbuffered through ncsimUseAddArgs
- •ncvhdlArguments
- •ncvlogArguments
- •ncvlogUseAddArgs
- •netClashFormat
- •netlistAfterCdfChange
- •netlistMode
- •netlistUDFAsMacro
- •neverwarn
- •noline
- •nomempack
- •nopragmawarn
- •nostdout
- •nowarn
- •paramDefVals
- •paramGlobalDefVal
- •pragma
- •processViewNames
- •prohibitCompile
- •runNcelab
- •runNcsim
- •scaddlglblopts
- •scaddltranopts
- •scale
- •scalem
- •scannotate
- •scapprox
- •scaudit
- •sccheckstmt
- •sccmin
- •sccompatible
- •scdebug
- •scdiagnose
- •scdigits
- •scerror
- •scerrpreset
- •scfastbreak
- •scgmin
- •scgmincheck
- •schomotopy
- •sciabstol
- •scic
- •scicstmt
- •scignshorts
- •scinfo
- •scinventory
- •sclimit
- •sclteratio
- •scmacromod
- •scmaxiters
- •scmaxnotes
- •scmaxrsd
- •scmaxstep
- •scmaxwarn
- •scmethod
- •scmodelevaltype
- •scmosvres
- •scnarrate
- •scnotation
- •scnote
- •scopptcheck
- •scpivabs
- •scpivotdc
- •scpivrel
- •scquantities
- •screadic
- •screadns
- •screlref
- •screltol
- •scrforce
- •scscale
- •scscalem
- •scscftimestamp
- •scscfusefileflag
- •scskipcount
- •scskipdc
- •scskipstart
- •scskipstop
- •scspeed
- •scstats
- •scstep
- •scstop
- •scstrobedelay
- •scstrobeperiod
- •sctemp
- •sctempeffects
- •sctitle
- •sctnom
- •sctopcheck
- •sctransave
- •scusemodeleval
- •scvabstol
- •scwarn
- •scwrite
- •simRunDirLoc
- •simVisScriptFile
- •status
- •templateFile
- •templateScript
- •timescale
- •update
- •use5xForVHDL
- •useDefparam
- •useNcelabNowarn
- •useNcelabSdfCmdFile
- •useNcsimNowarn
- •useNowarn
- •useScaddlglblopts
- •useScaddltranopts
- •useScic
- •useScreadic
- •useScreadns
- •useScwrite
- •useSimVisScriptFile
- •useProcessViewNamesOnly
- •verboseUpdate
- •vlogGroundSigs
- •vloglinedebug
- •vlogSupply0Sigs
- •vlogSupply1Sigs
- •wfDefaultDatabase
- •wfDefInstCSaveAll
- •wfDefInstCSaveLvl
- •wfDefInstSaveCurrents
- •wfDefInstSaveVoltages
- •wfDefInstVSaveAll
- •wfDefInstVSaveLvl
- •wfDefInstVSaveObjects
- •Updating Legacy SimInfo for Analog Primitives
- •The ams Fields
- •Special Handling of model, modelName, modelname, and componentName
- •Converting an Existing Analog Primitive Library
- •Designing for Virtuoso AMS Compliance
- •Terminals
- •Buses
- •Component Description Format
- •Parameters
- •Using Inherited Parameters
- •Using Cell Parameters
- •Parameterized Cells
- •VHDL-AMS Component Declarations
- •Properties
- •Properties to Avoid Completely
- •Avoid the portOrder Property Unless Required by Special Circumstances
- •Properties to Use Only in AMS Compatibility Mode
- •Properties That Have No Special Meaning in the AMS Environment
- •Properties Fully Supported by the AMS Environment
- •SKILL Functions
- •amsCheckCV
- •amsIsPresent
- •amsNetlist
- •amsProcessCellViews
- •amsUIOptionsForm
- •amsUIRunNetlisterForm
- •ddsCvtAMSTranslateCell
- •ddsCvtAMSTranslateLib
- •ddsCvtToolBoxAMS
- •vmsUpdateCellViews
- •Customization Variables
- •schHdlNotCreateDB
- •schHdlUseVamsForVerilog
- •vmsAnalysisType
- •vmsCreateMissingMasters
- •vmsNcvlogExecutable
- •vmsPortProcessing
- •vmsRunningInUI
- •vmsTemplateScript
- •vmsVerboseMsgLevel
- •Compiling Cadence-Provided Libraries
- •Purpose of the amsLibCompile Tool
- •Running the amsLibCompile Tool Manually
- •Example

Virtuoso AMS Environment User Guide
Elaborating, Simulating, and Plotting Results
The following table briefly describes the fields. For more information, see the“ncelab Command Syntax and Options” section in the “Elaborating” chapter of theVirtuoso
AMS Simulator User Guide.
Field |
Corresponding ncelab |
Effect |
|
Option |
|
|
|
|
Print informational |
-messages |
Prints informative messages during |
messages |
|
elaboration. |
Display runtime |
-status |
Prints statistics on memory and |
status |
|
CPU usage after elaboration. |
Suppress all |
-neverwarn |
Disables printing of all warning |
warnings |
|
messages. |
Suppress specific |
-nowarn |
Disables printing of the specified |
warnings |
|
warning message. |
Suppress output to |
-nostdout |
Suppresses the printing of most |
screen |
|
output to the screen. |
Suppress copyright |
-nocopyright |
Suppresses printing of the copyright |
information |
|
banner. |
Print messages |
-libverbose |
Displays messages about module |
about resolving |
|
and UDP instantiations. |
instances (Verilog |
|
|
only) |
|
|
Enable code |
-coverage |
Enables coverage instrumentation. |
coverage for entire |
|
|
design (digital only) |
|
|
|
|
|
4. When you are done changing options, click OK to save your changes.
Setting Simulator Options
AMS Designer provides many options for the simulator, that allow you to tailor the simulator behavior for your needs. You can access the option settings for the simulator from the
Cadence hierarchy editor.
1.From the hierarchy editor, choose AMS – Options.
If the AMS menu entry is not visible, follow the instructions in “Specifying the Behavior of the Netlister and Compilers” on page 74.
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The AMS Options window appears.
2.Expand the Simulator category as necessary to find the options you want to change.
When fully expanded, the Simulator category displays the following subcategories.
3.Highlight the category that you want to change.
The corresponding pane appears. For information about the fields in each pane, see the following cross-references:
For information about this category |
See |
|
Simulator |
“Specifying Basic Optionsorf the |
|
|
Simulator” on page 249 |
|
Performance |
“SpecifyingPerformance Options for the |
|
|
Simulator” on page 251 |
|
C Interface |
“Specifying C Interface Options for the |
|
|
Simulator” on page 255 |
|
Messages/Errors |
“Specifying Message and Error Options |
|
|
for the Simulator” on page 256 |
|
Analog Solver |
“Specifying General Options for the |
|
|
Analog Solver” on page 258 |
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For information about this category |
See |
Convergence/Accuracy |
“Specifying Convergence and Accuracy |
|
Options for the Analog Solver” on |
|
page 260 |
Output/Debug |
“Specifying Output and Debug Options |
|
for the Analog Solver” on page 265 |
Tran Analysis |
“Specifying aransientT Analysis for the |
|
Analog Solver” on page 268 |
Convergence/Accuracy |
“Specifying Convergence and Accuracy |
|
Options for a Transient Analysis” on |
|
page 269 |
Output |
“Specifying Output and Debug Options |
|
for a Transient Analysis” on page 273 |
Specifying Basic Options for the Simulator |
|
To specify basic options for the simulator,. |
|
1.From the hierarchy editor, choose AMS – Options.
If the AMS menu entry is not visible, follow the instructions in “Specifying the Behavior of the Netlister and Compilers” on page 74.
The AMS Options window appears.
2.Highlight the Simulator category.
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The Simulator pane opens.
3.Fill in the fields as necessary.
The following table briefly describes the fields and tells you where to go for more information. All of the cross-references in the table are to the “Simulating” chapter of the
Virtuoso AMS Simulator User Guide.
Field |
Corresponding ncsim |
Effect |
|
Option |
|||
|
|
||
|
|
|
|
Maximum number of |
-errormax |
Specifies the maximum number of |
|
errors |
|
errors to process. Errors caused by |
|
|
|
Tcl command files or by interactive |
|
|
|
Tcl commands do not count toward |
|
|
|
the limit. |
|
Log file |
-append_log, |
Determines whether a log file is to |
|
|
-nolog |
be created, and, if so, whether the |
|
|
|
new information is to overwrite any |
|
|
|
existing log or be appended. |
|
Tcl input script |
-input |
Specifies a script file to run at the |
|
|
|
beginning of the simulation. |
|
Update if needed |
-update |
Recompiles out-of-date design units |
|
|
|
as necessary. |
|
Ignore source file |
-nosource |
Turns off source file timestamp |
|
timestamps when |
|
checking when using the -update |
|
using -update |
|
option. |
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Field |
Corresponding ncsim |
Effect |
|
Option |
|||
|
|
||
|
|
|
|
Additional |
|
To pass to the simulator arguments |
|
arguments |
|
that are not available in the GUI, |
|
|
|
type the arguments into this field. |
|
|
|
|
4. Click OK to save your changes.
Specifying Performance Options for the Simulator
To specify performance options for the simulator,
1. From the Cadence hierarchy editor, choose AMS – Options.
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2.In the AMS Options window, choose Simulator – Performance to open the AMS
Options window to the Performance pane.
3.Select fields as necessary.
The following table briefly describes the fields and tells you the corresponding option or option card. For additional information about ncsim options, see the “ncsimCommand Syntax and Options” section, in the “Simulating” chapter of theVirtuoso AMS
Simulator User Guide. For additional information about the mos_method options card,
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see the “Immediate Set Options (options)” section, in the “Specifying Controls for the
Analog Solver” chapter of the Virtuoso AMS Simulator User Guide.
Field |
Corresponding Option |
Effect |
|
|
|
Use reduced |
ncsim -redmem |
Turns off loading of intermediate |
memory image size |
|
objects generated by the compiler. |
Do not buffer output |
ncsim -unbuffered |
Bypasses the file I/O buffer so that |
|
|
data displays immediately. |
OMI checking level |
ncsim |
Specifies the OMI checking level to |
|
-omicheckinglevel |
use. |
Generate runtime |
ncsim -profile |
Generates a run time profile of the |
profile |
|
design. The profiling information is |
|
|
written to the ncprof.out file only |
|
|
after the simulator session is exited. |
|
|
Depending on the simulator you are |
|
|
using, this command might be |
|
|
restricted to digital only. |
Allow profiling of |
ncsim -profthread |
Allows threaded processes to be |
threaded processes |
|
profiled. |
(digital only) |
|
|
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Field |
Corresponding Option |
Effect |
|
|
|
Model evaluation |
|
When checked, writes the selected |
|
|
mos_method option, as described |
|
|
for Standard or Accelerated |
|
|
(table model). When unchecked, |
|
|
writes nothing. |
|
|
This field is disabled when theUse |
|
|
simulation control file field, in the |
|
|
Analog Solver pane, is turned on. |
|
|
(This field appears only if the AMS |
|
|
simulator you are running supports |
|
|
it.) |
Standard |
The analog simulation |
Instructs the simulator not to use |
|
control (.scs) file option table models for any instances. |
|
|
card: |
|
|
amsOptions options |
|
|
+ mos_method = s |
|
Accelerated |
The analog simulation |
Instructs the simulator to use table |
(table model) |
control (.scs) file card: |
models whenever possible. This |
|
amsOptions options |
global option applies to the entire |
|
+ mos_method = a |
simulated design. You can override |
|
|
this instruction on specific model |
|
|
cards by setting mos_method = s |
|
|
as an option on those cards. |
Table model grid |
The analog simulation |
Specifies the voltage increment for |
size |
control (.scs) file option the mosfet table model interpolation |
|
|
card: |
grid. For more information, see |
|
amsOptions options |
“scmosvres” on page 506. |
|
+ mos_vres = value |
|
Node reduction |
The analog simulation |
Specifies the threshold below which |
threshold |
control (.scs) file option parasitic node reduction occurs. |
card:
amsOptions options + maxrsd = value
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Field |
Corresponding Option |
Effect |
|
|
|
Speed dial |
The analog simulation |
Establishes the tradeoff between |
|
control (.scs) file option simulation performance and |
|
|
card: |
accuracy. |
amsOptions options
+speed = value
4.When you are done changing options, click OK to save your changes.
Specifying C Interface Options for the Simulator
To specify C interface options for the simulator,
1.From the Cadence hierarchy editor, choose AMS – Options.
2.In the AMS Options window, choose Simulator – C Interface to open the AMS Options window to the C Interface pane.
3. Fill in and select fields as necessary.
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The following table briefly describes the fields. For additional information, see the“ncsim Command Syntax and Options” section, in the “Simulating” chapter of theVirtuoso
AMS Simulator User Guide.
Field |
Corresponding ncsim |
Effect |
|
Option |
|||
|
|
||
|
|
|
|
Verilog Only |
|
|
|
Dynamically load |
-loadvpi |
Dynamically loads a VPI |
|
VPI libraries |
|
application. |
|
Suppress VPI/PLI |
-plinowarn |
Disables printing of PLI warning |
|
warning and error |
|
and error messages. |
|
messages |
|
|
|
Suppress VPI/PLI |
-plinooptwarn |
Prints a warning message only the |
|
messages |
|
first time that a PLI read, write, or |
|
caused by |
|
connectivity access violation is |
|
optimization |
|
detected. |
|
VHDL Only |
|
|
|
Disable |
-nocifcheck |
Disables constraint checking in |
|
constraint |
|
VHDL Design Access (VDA) |
|
checking in VDA |
|
functions, for increased |
|
applications |
|
performance. |
|
|
|
|
4. When you are done changing options, click OK to save your changes.
Specifying Message and Error Options for the Simulator
To specify message and error options for the simulator,
1. From the Cadence hierarchy editor, choose AMS – Options.
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2.In the AMS Options window, choose Simulator – Messages/Errors to open the AMS
Options window to the Simulator Messages/Errors pane.
3.Fill in and select fields as necessary.
The following table briefly describes the fields and tells you where to go for more information. For additional information, see the “ncsim Command Syntax and Options” section, in the “Simulating” chapter of theVirtuoso AMS Simulator User Guide.
Field |
Corresponding ncsim |
Effect |
|
Option |
|||
|
|
||
|
|
|
|
Print informational |
-messages |
Prints informative messages during |
|
messages |
|
simulation. |
|
Display runtime |
-status |
Prints statistics on memory and |
|
status |
|
CPU usage after simulation. |
|
Suppress all |
-neverwarn |
Disables printing of all warning |
|
warnings |
|
messages. |
|
Suppress specific |
-nowarn |
Disables printing of the specified |
|
warnings |
|
warning message. |
|
Suppress output to |
-nostdout |
Suppresses the printing of most |
|
screen |
|
output to the screen. |
|
Print extended |
-extassertmsg |
Prints extended assert message |
|
VHDL assert |
|
Information. |
|
messages |
|
|
|
Suppress e-pulse |
-epulse_no_msg |
Suppresses e-pulse error |
|
error messages |
|
messages. |
|
|
|
|
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4. When you are done changing options, click OK to save your changes.
Specifying General Options for the Analog Solver
In the analog solver panes, you can specify many options that determine how the analog simulation proceeds.
When Analog Solver Options Are Written to the Analog Control File
If you specify, for an analog solver option, a value that is not the simulator default, AMS
Designer writes the option and value to the analog control file, which controls the simulation.
However, when a value in the analog solver panes is the same as the corresponding simulator default value, AMS Designer does not write the option to the analog control file. In this situation, the simulator uses the corresponding value set in the model files, if there is such a value. If there is no corresponding value in the model files, the simulator uses the simulator default value. For more information about how the AMS simulator determines what value to use for options, see the “Immediate Set Options (options)” section in Chapter 8, of the Virtuoso AMS Simulator User Guide.
Popping Up Information About Analog Solver Options
Holding the cursor over a label in the analog solver panes pops up information about the default value for that option. For example, in the following screen capture, the pop-up contains information about the default value of the option.
Specifying Basic Information for the Analog Solver
To specify basic information for the analog solver,
1. From the Cadence hierarchy editor, choose AMS – Options.
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2.In the AMS Options window, choose Simulator – Analog Solver to display the Analog
Solver pane.
3.Choose how the analog solver is to be controlled.
If you want the analog solver to use an existing simulation control file,
a.Check the box next to Use simulation control file.
b.Specify the control file in theUse simulation control file field. The path can contain shell environment variables.
You can type the fully qualified path and name, or clickBrowse to locate the file that you want to use. (If you do not have an existing file, you can open a template by typing a name and clicking Edit.)
You can also type in a relative path, which is evaluated relative to the run directory, or a simple file name to refer to a file that is located in the run directory.
The simulation control file contains commands that tell the analog solver how to simulate the design. For more information, see the “Specifying Controlsorf the Analog Solver” chapter, in the Virtuoso AMS Simulator User Guide.
If you want to use the AMS Options GUI to generate a new simulation control file,
a.Ensure that the box next to Use simulation control file is not checked.
b.Use the Convergence/Accuracy, Output/Debug, and Tran Analysis subcategories of the Analog Solver category to specify the behavior of the simulator.
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If you use this approach, you must specify a stop time, at least. For guidance, see “Specifying aransientT Analysis for the Analog Solver” on page 268.
4.(Optional) Type the name of a simulation control file into theInclude simulation control file field.
The path can contain shell environment variables.
The specified simulation control file is included in the simulation control file generated from the options you specify in the GUI. For example, you type
~/fpga.scs
into the Include simulation control file field. When you clickOK, AMS Designer checks that the file exists, and if it does, includes it in the generated simulation control
file with a statement like this.
include "/usr1/mnt4/lorenp/fpga.scs"
5.(Optional) Type into the Additional options field any options that you want to append to the end of the options card in the simulation control file.
For example, you type
rawfile = "/hm/kat/amsAnalysis"
into the Additional options field. AMS Designer adds the value to the end of the options card, like this.
amsOptions options
+gmin_check = all
+inventory = detailed
+rawfile = "/hm/kat/amsAnalysis"
6.When you finish setting options, clickOK to save your changes.
Specifying Convergence and Accuracy Options for the Analog Solver
You can access the convergence and accuracy option settings for the analog solver from the
Cadence hierarchy editor.
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1.In the AMS Options window, choose Simulator – Analog Solver – Convergence/
Accuracy to open the AMS Options window to the Convergence/Accuracy pane.
2.Fill in and select fields as necessary.
The following table briefly describes the fields and tells you where to go for more information. For additional information, see the “Immediate Set Options (options)” section, in the “Specifying Controls for the Analog Solver” chapter of theVirtuoso AMS
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Simulator User Guide and the “Immediate Set Options (options)” section, in the “AnalysisStatements” chapter of the Virtuoso Spectre Circuit Simulator Reference.
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Corresponding |
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Field |
spectre Option and |
Effect |
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Parameter |
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Tolerances |
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Reltol |
options reltol |
Specifies the maximum relative |
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tolerance for values computed in |
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the last two iterations of a solution. |
Vabstol |
options vabstol |
Specifies the absolute tolerance for |
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differences in the computed values |
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of the voltages in the last two |
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iterations of a solution. |
Iabstol |
options iabstol |
Specifies the absolute tolerance for |
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differences in the computed values |
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of the currents in the last two |
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iterations of a solution. |
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Corresponding |
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Field |
spectre Option and |
Effect |
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Parameter |
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Temperature |
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Temp |
options temp |
Specifies the circuit temperature in |
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degrees Celsius. |
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Tnom |
options tnom |
Specifies the measurement |
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(nominal) temperature in degrees |
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Celsius. |
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Tempeffects |
options |
Defines how temperature affects |
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tempeffects |
the built-in primitive components. It |
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takes the following three values: |
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vt–Only thermal voltage |
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V |
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kT |
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t |
= ------ |
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q |
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can vary with temperature. |
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tc–In addition to thermal voltage, |
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the component temperature |
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coefficient parameters (parameters |
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that start with tc, such as tc1, and |
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tc2) are active. Use this setting |
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when you want to disable the |
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temperature effects for nonlinear |
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devices. |
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all–All built-in temperature models |
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are enabled. |
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Convergence |
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Homotopy |
options homotopy |
Specifies the method to use if |
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convergence fails on the initial DC |
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analysis attempt. |
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Limit |
options limit |
Specifies the limiting algorithm used |
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to aid DC convergence. |
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Corresponding |
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Field |
spectre Option and |
Effect |
|
Parameter |
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Resistance |
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Gmin |
options gmin |
Specifies the minimum |
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conductance across each nonlinear |
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device. |
Gmin check |
options gmin_check |
Specifies how the effect ofGmin (if |
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that effect is significant) is to be |
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reported. |
Rforce |
options rforce |
Specifies the resistance to be used |
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when forcing nodesets and node- |
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based initial conditions. |
Matrix |
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Pivrel |
options pivrel |
Specifies the relative pivot |
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threshold. |
Pivabs |
options pivabs |
Specifies the absolute pivot |
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threshold. |
Pivotdc |
options pivotdc |
Specifies that numeric pivoting be |
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used on every iteration of DC |
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analysis. |
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Corresponding |
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Field |
spectre Option and |
Effect |
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Parameter |
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Component Controls |
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Approx |
options approx |
Specifies that approximate models |
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are to be used. The difference |
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between approximate and exact |
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models is generally very small. |
Macromodels |
options |
Specifies that the circuit contains |
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macromodels |
macromodels. Sometimes |
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specifying this information improves |
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performance. |
Scalem |
options scalem |
Specifies the scaling factor for |
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models. |
Scale |
options scale |
Specifies the scaling factor for |
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device instances. |
Compatible |
options compatible |
Specifies a simulator. AMS |
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Designer changes device models to |
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improve consistency with the |
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models in the specified simulator. |
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3. When you are done changing options, click OK to save your changes.
Specifying Output and Debug Options for the Analog Solver
You can access the output and debug option settings for the analog solver from the Cadence hierarchy editor.
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1.In the AMS Options window, choose Simulator – Analog Solver – Output/Debug to open the AMS Options window to the Output/Debug pane.
2.Fill in and select fields as necessary.
The following table briefly describes the fields. For additional information, see the “Immediate Set Options (options)” section, in the “Specifying Controls for the Analog
Solver” chapter of the Virtuoso AMS Simulator User Guide and the “Immediate Set
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Options (options)” section, in the “Analysis Statements” chapter of theVirtuoso
Spectre Circuit Simulator Reference.
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Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
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Output Options |
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Print quantities |
options quantities |
Prints quantities. |
Print time taken |
options audit |
Prints the time required by various |
for simulation |
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parts of the simulation. |
Print summary of |
options inventory |
Prints a summary of the |
components |
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components used. |
Narrate the |
options narrate |
Narrates the simulation. |
simulation |
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options info |
Prints informational messages. |
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informational |
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messages |
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Print notice |
options note |
Prints notice messages. |
messages |
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Maximum per |
options maxnotes |
Specifies the maximum number of |
notice message |
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times any particular notice will be |
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issued per analysis. |
Print warning |
options warn |
Prints warning messages. |
messages |
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Maximum per |
options maxwarn |
Specifies the maximum number of |
warning message |
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times any particular warning will be |
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issued per analysis. |
Print error |
options error |
Prints error messages. |
messages |
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Print debugging |
options debug |
Prints debugging information. |
messages |
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Number of digits |
options digits |
Specifies the number of digits used |
per number |
|
when printing numbers. |
Numeric notation |
options notation |
Specifies the notation to be used |
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when displaying real numbers. |
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|
Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
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Debug Options |
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|
Analog circuit |
options topcheck |
Checks the circuit topology for |
topology check |
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errors. |
Print information |
options diagnose |
Prints information that might help |
to diagnose |
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diagnose accuracy and |
accuracy and |
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convergence problems. |
convergence |
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problems |
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Silently ignore |
options ignshorts |
Tells the simulator to ignore shorted |
shorted |
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components silently. |
components |
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Check operating |
options opptcheck |
Checks the operating point |
point parameters |
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parameters against soft limits. |
against soft limits |
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3. When you are done changing options, click OK to save your changes.
Specifying a Transient Analysis for the Analog Solver
You can access the transient analysis option settings for the analog solver from the Cadence hierarchy editor.
1.In the AMS Options window, choose Simulator – Analog Solver – Tran Analysis to open the AMS Options window to the Tran Analysis pane.
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2.Fill in and select fields as necessary.
The following table briefly describes the fields. For additional information, see the
“Transient Analysis (tran)” section, in the “Specifying Controls for the Analog Solver” chapter of the Virtuoso AMS Simulator User Guide and the “Transient Analysis (tran)” section, in the “Analysis Statements” chapter of theVirtuoso Spectre Circuit
Simulator Reference.
|
Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
|
|
|
|
Analysis title |
tran title |
Specifies a title for the analysis. |
Stop time |
tran stop |
Specifies the stop time for the |
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analysis. You must specify a value |
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for this field. |
Error preset |
tran errpreset |
Specifies a collection of parameter |
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settings for the analysis. |
Additional options |
|
Specifies additional options that you |
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want to append to the end of the |
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tran card in the simulation control |
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file. |
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For example, you type |
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outputstart=0.0005 |
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into the Additional options field. |
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AMS Designer adds the value to the |
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end of the tran card, like this. |
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amsAnalysis tran |
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+ stop = 0.001 |
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+ method = euler |
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+ relref = pointlocal |
|
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+ outputstart=0.0005 |
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3. When you are done changing options, click OK to save your changes.
Specifying Convergence and Accuracy Options for a Transient Analysis
You can access the convergence and accuracy option settings for the transient analysis from the Cadence hierarchy editor.
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1.In the AMS Options window, choose Simulator – Analog Solver – Tran Analysis –
Convergence/Accuracy to display the Tran Convergence/Accuracy pane.
2.Fill in and select fields as necessary.
The following table briefly describes the fields. For additional information, see the
“Transient Analysis (tran)” section, in the “Specifying Controls for the Analog Solver” chapter of the Virtuoso AMS Simulator User Guide and the “Transient Analysis (tran)”
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section, in the “Analysis Statements” chapter of theVirtuoso Spectre Circuit
Simulator Reference
|
Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
|
|
|
|
Numerical Options |
|
|
Integration |
tran method |
Specifies the integration method to |
method |
|
use. |
Cmin |
tran cmin |
Specifies the minimum capacitance |
|
|
from each node to ground. |
Step |
tran step |
Specifies the minimum time step to |
|
|
use. You might need to set this |
|
|
value to maintain the aesthetics of |
|
|
computed waveforms. |
Maxstep |
tran maxstep |
Specifies the maximum time step. |
Relref |
tran relref |
Specifies the reference to use for |
|
|
the relative convergence criteria. |
Lteratio |
tran lteratio |
Specifies the ratio to use to |
|
|
compute LTE tolerances from |
|
|
Newton tolerance. |
Maxiters |
tran maxiters |
Specifies the maximum number of |
|
|
iterations per time step. |
Fastbreak |
tran fastbreak |
Specifies the evaluation method to |
(VHDL-AMS only) |
|
use for VHDL-AMS break |
|
|
statements. |
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|
Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
|
|
|
|
Initial Conditions/ |
|
|
Nodesets |
|
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Initial conditions |
tran ic |
Specifies the objects for which the |
|
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simulator is to set initial conditions. |
|
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For example, you specify the value |
|
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dev for this field. As a result, the |
|
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generated simulation control file |
|
|
contains the ic = dev option. |
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amsAnalysis tran |
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+ stop = 0.001 |
|
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+ ic = dev |
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+ method = euler |
Set initial |
ic |
Specifies initial conditions for nodes |
conditions |
|
and devices in the design. |
|
|
For example, you type the following |
|
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into this field. |
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7=0 out=1 OpAmp1.comp=5 |
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L1:1=1.0u |
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As a result, the generated |
|
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simulation control file contains the |
|
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statement: |
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ic 7=0 out=1 OpAmp1.comp=5 |
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L1:1=1.0u |
Read IC from file |
tran readic |
Specifies a file that contains initial |
|
|
conditions. |
Read nodesets |
tran readns |
Specifies a file that contains |
from file |
|
nodesets. |
Skipdc |
tran skipdc |
If yes, there is no DC analysis for |
|
|
transient. |
|
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3. When you are done changing options, click OK to save your changes.
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Specifying Output and Debug Options for a Transient Analysis
You can access the output and debug option settings for the transient analysis from the
Cadence hierarchy editor.
1.In the AMS Options window, choose Simulator – Analog Solver – Tran Analysis –
Output to display the Tran Output pane.
2.Fill in and select fields as necessary.
The following table briefly describes the fields. For additional information, see the
“Transient Analysis (tran)” section, in the “Specifying Controls for the Analog Solver” chapter of the Virtuoso AMS Simulator User Guide and the “Transient Analysis (tran)” section, in the “Analysis Statements” chapter of theVirtuoso Spectre Circuit Simulator Reference
|
Corresponding |
|
Field |
spectre Option and |
Effect |
|
Parameter |
|
|
|
|
Write initial solution |
tran write |
Directs the simulator to write the |
to file |
|
initial transient solution to the |
|
|
specified file. |
Write final solution to |
tran writefinal |
Directs the simulator to write the |
file |
|
final transient solution to the |
|
|
specified file. |
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