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Virtuoso AMS Environment User Guide

Netlisting

bus data. The associated warning, if issued, tells you how the non-compliant bus data is transformed.

Sparse buses: Overdeclares any sparse buses.

For information on the corresponding ams.env variables, see “allowIllegalIdentifiers” on page 370, “allowNameCollisions” on page 372, “allowDeviantBuses” on page 368, and “allowSparseBuses” on page 374.

Opening the CIW AMS Options Window

To review or change the current options from the CIW,

From the CIW, choose Tools – AMS – Options. The AMS Options window appears.

For guidance on setting these options

Check and Save

Netlister

Compiler

See

“Setting Check and Save Options” on page 86 “Setting Netlister Options from the CIW” on page 87 “Setting Compiler Options from the CIW” on page 114

Setting Check and Save Options

With the options in this category, you can specify the overall behavior of the AMS netlister.

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To set the Check and Save options,

1. Select Check and Save in the Categories field.

2.Select what you want the AMS netlister to do. You can choose to have the netlister check, netlist, and compile the cellview. For information on the corresponding ams.env variables, see “checkOnly” on page 394, “checkAndNetlist” on page 393, and “prohibitCompile” on page 468.

For example, assume that the settings are as given in the previous illustration. If you use Virtuoso Schematic Editor to edit a schematic cellview and then use the Check and

Save command, the AMS netlister automatically checks, netlists, and compiles the cellview.

Setting Netlister Options from the CIW

The netlister options available from the CIW interface are organized in the following categories:

Category

Purpose

For information, see

Netlister

Controls general netlister

“Setting General Netlister

 

options

Options” on page 88

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Category

Purpose

For information, see

Verilog-AMS

Controls how language

“Setting Language

 

extensions are handled

Extension Options” on

 

 

page 89

View Selection

Controls how AMS Designer

“Setting View Selection

 

selects views for netlisting

Options” on page 90

CDF Parameter

Specifies default values for

“Setting Default Values for

Defaults

CDF parameters

CDF Parameters” on

 

 

page 92

Template

Controls what information

 

and files are included in

 

netlist templates

Compatibility

Controls options that allow

 

you to retain data

 

compatibility with older

 

netlisters, such as the

 

Cadence analog design

 

environment or Verilog Integ

“SettingemplateT Header and File Include Options” on page 93

“Setting Compatibility Options” on page 96

Setting General Netlister Options

With the option in this category, you can set the maximum number of error messages displayed in the log file when you netlist, and specify the scaling notation to be used for parameter values.

To set the message and scaling notation options,

1. Select Netlister in the Categories field.

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The associated option fields appear.

2.Click and type in the Maximum number of errors field to set the maximum number of errors the AMS netlister can encounter before it stops processing the design.

For information on the corresponding ams.env variable, see “amsMaxErrors” on page 385.

Note: If any errors are found, no netlist is generated and any existing netlist is removed. This behavior ensures that you do not inadvertently simulate an out-of-date netlist.

3.Turn on Print information messages to increase the amount of information produced, as you might want to do when you are debugging a problem.

4.Select a Use scaling notation for parameter values button to set the scaling notation that you want to use for parameter values.

Select Scientific to expand scaling factor suffixes in scientific notation.

Select Decimal to expand scaling factor suffixes in decimal notation.

For information on the corresponding ams.env variable, see “amsExpScalingFactor” on page 382. This cross-reference has a list of scaling factor suffixes supported by various target simulators.

Setting Language Extension Options

With the option in this category, you can specify how language extensions are handled.

To set the language extensions option,

1. Select Netlister – Verilog-AMS in the Categories field.

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The associated option field appears.

2.Select the Conditionally include language extensions option if you want extended language constructs to be conditionally included.

If you select this option, the netlister sets off language extensions with `ifdef INCA directives, which facilitates using the netlist in simulators that do not support the extensions.

For information on the corresponding ams.env variable, see “ifdefLanguageExtensions” on page 410.

Setting View Selection Options

The AMS netlister can translate four types of CDBA cellviews: schematic, symbolic, netlist, and maskLayout.

To specify which of the four types are to be netlisted,

1. Select Netlister – Verilog-AMS – View Selection in the Categories field.

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The associated option fields appear.

2.In the View selection for checking/netlisting area, select the method to be used for choosing views.

Selecting Use ‘Eligible view types and view names to exclude’ indicates that the views are specified by theEligible view types field in conjunction with theView names to exclude field. If you use this method,

a.Select cellview types in the Legal view types field and clickAdd to make the cellview types eligible for netlisting. For information on the corresponding ams.env variable, see “amsEligibleViewTypes” on page 380.

b.As necessary, select cellview types in the Eligible view types field and click Remove to make the view types ineligible for netlisting.

c.In the View names to exclude field, type regular syntax expressions to specify view names that are not to be processed. For information on the corresponding ams.env variable, see “excludeViewNames” on page 406.

Selecting Use ‘View names to process’ indicates that the views are specified by only the View names to process field. If you use this method,

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a.In the View names to process field, type regular syntax expressions to specify view names to be processed. For information on the corresponding ams.env variable, see “useProcessViewNamesOnly” on page 571

For example, assume the options are set to the selections in the previous illustration. Assume also that the AMS netlister runs on a cell that has the six schematic views sch0, sch1, sch2, sch3, sch4, and sch5. In this situation, the netlister processes only the sch4 and sch5 views.

On the other hand, if Use ‘View names to process’ is selected, the netlister processes only the sch1, sch3, and sch4 views.

Setting Default Values for CDF Parameters

With the options in this category, you can specify parameter and value pairs.

To work with parameters and values,

1.Select Netlister – Verilog-AMS – CDF Parameter Defaults in the Categories field. The associated option fields appear.

2. To add a parameter default value,

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a.Type the name of the parameter in the Name field.

b.In the Type field, selectinteger or real to indicate the type of the parameter.

c.Type a default value into the Value field.

The AMS netlister uses this default value when the parameter does not have a default value in the CDBA data.

d.Click Add.

For information on the corresponding ams.env variable, see “paramDefVals” on page 464.

3.To specify a global default parameter value, type a default value into the Global default parameter value field.

For information on the corresponding ams.env variable, see “paramGlobalDefVal” on page 465.

The AMS netlister uses this default value for any parameter in the CDBA data that does not otherwise have a default value.

4.To remove a parameter, select it and then click Remove.

Setting Template Header and File Include Options

With the options in this category, you can specify headers for AMS netlists and the names of files to be included by‘include directives.

To open the pane,

Select Netlister – Verilog-AMS – Template in the Categories field.

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The associated option fields appear.

To specify headers for netlists generated by AMS Designer,

1.In the Template Header area, select the method you want to use to specify template headers.

For information on the corresponding ams.env variable, see “headerTxt” on page 408.

Default

Inserts the default header at the top of each generated netlist. For

 

example, choosing Default inserts the following text into netlists.

 

//

Verilog-AMS netlist generated by the AMS netlister.

 

//

Cadence Design Systems, Inc.

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Insert the

Inserts the default header and the contents of the specified file at

following file as

the top of each generated netlist. For example, choosing Insert

netlist header

the following file as netlist header and specifying a file

 

containing the following text

 

// Module produced by

 

// ASIC Team: Ocelot

 

// San Jose Development Center

 

inserts the following at the top of each generated netlist.

 

// Verilog-AMS netlist generated by the AMS netlister.

 

// Cadence Design Systems, Inc.

 

// Module produced by

 

// ASIC Team: Ocelot

 

// San Jose Development Center

Create netlist

Inserts the default header and the results of running the specified

header with the

script at the top of each generated netlist. For example, Choosing

following script

Create netlist header with the following script and specifying

 

a file containing the following script

 

echo ’// Module produced by:’

 

echo ’// ASIC Interactive, Ltd.’

 

printf ’// (c) ’

 

date ’+DATE: %m/%d/%y%n’

 

inserts the following at the top of each generated netlist.

//Verilog-AMS netlist generated by the AMS netlister.

//Cadence Design Systems, Inc.

//Module produced by:

//ASIC Interactive, Ltd.

//(c) DATE: 10/10/01

2.If the Text filename field or theScript filename field is active, specify the path and filename of the text file or script file.

Relative paths are resolved with respect to the directory from which you opened the CIW.

For information on the corresponding ams.env variables, see “templateFile” on page 551 and “templateScript” on page 552.

3.When you are done making changes to the pane, click OK.

To specify files to be included in the netlist by‘include directives,

1.Type the name of the file to include in theFilename field. The name that you enter appears verbatim in the netlist.

For information on the corresponding ams.env variable, see “includeFiles” on page 412.

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2.Click Add to add the filename to the list of filenames displayed below theFilename field.

The newly added file is included, with a‘include directive, in every netlist. To control which file of that name is included, you can use theInclude Directories table accessed by choosing Compiler – Verilog-AMS – Macros/Includes in the Categories pane.

For guidance, see “Specifying Macros and Specifying Directories to be Searched” on page 118.

3.To remove a file, select the filename from the list, and then clickRemove.

4.If necessary, move a filename up or down in the list by clicking the up and down arrows.

Files are included in the netlist in the order that they appear in the list. The order is important if you have files that use declarations in another file. For example,File2if

uses a declaration from File1, you must ensure that File1 is above File2 in the list.

5.When you are done making changes to the pane, click OK.

Setting Compatibility Options

If you have the following design exceptions in your cellview, the AMS netlister, by default, either issues a warning or does not create a netlist.

Exception

For an explanation of the exception and a description of the

corresponding ams.env variable, see

 

Illegal identifiers

“allowIllegalIdentifiers” on page 370

Name collisions

“allowNameCollisions” on page 372

Conflicting bus ranges

“allowDeviantBuses” on page 368

Sparse buses

“allowSparseBuses” on page 374

You can override this default behavior by changing the settings in the Compatibility: Verilog-AMS options category.

To change the settings,

1. Select Netlister – Verilog-AMS – Compatibility in the Categories field.

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The associated option fields appear.

2.Select the settings you want for each of the exceptions.

Each exception has the following possible settings:

No – Print Errors: The AMS netlister issues an error if the netlister encounters the design exception. No netlist is produced.

Yes – Print Warnings: The AMS netlister issues a warning if the netlister encounters the design exception. Netlisting continues after the netlister makes necessary changes.

Yes – Silently: The AMS netlister continues netlisting if it encounters the design exception, after making changes that allow netlisting to continue. The AMS netlister does not issue a warning.

If you select Yes – Print Warnings or Yes – Silently, the AMS netlister makes the following changes when it encounters a design exception.

Illegal identifiers: Maps non-compliant identifiers to names that are legal in the target language. The associated warning, if issued, tells you how the name is mapped.

Name collisions: Maps non-compliant names to system-generated names that are legal in the target language.

Conflicting bus ranges: Netlisting continues if it is possible to create a valid netlist. The generated netlist is likely to be less readable than one created from compliant bus data. The associated warning, if issued, tells you how the non-compliant bus data is transformed.

Sparse buses: Overdeclares any sparse buses.

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