8XC196EA USER’S MANUAL

4.4CONTROLLING READ ACCESS TO THE INTERNAL ROM

The LOC bit in CCR0 (Figure 4-8) controls read access to the internal ROM. Clear the LOC bit in CCB0 to enable read protection. To allow authorized access for program verification, program a security key into special-purpose memory (locations FF2020–FF202FH). Once a security key is programmed, you must supply a matching key to gain access to the internal ROM. (See Chapter 17, “Using the Test-ROM Routines,” for additional information.)

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The chip configuration 0 (CCR0) register controls ROM access, enables or disables the IDLPD #1 and IDLPD #2 instructions and selects the write-control mode. It also contains the bus-control parameters for fetching chip configuration byte 1.

†The CCRs are loaded with the contents of the chip configuration bytes (CCBs) after reset. The CCBs reside at addresses FF2018H (CCB0) and FF201AH (CCB1).

Figure 4-8. Chip Configuration 0 (CCR0) Register

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8XC196EA USER’S MANUAL

The chip configuration 0 (CCR0) register controls ROM access, enables or disables the IDLPD #1 and IDLPD #2 instructions and selects the write-control mode. It also contains the bus-control parameters for fetching chip configuration byte 1.

†The CCRs are loaded with the contents of the chip configuration bytes (CCBs) after reset. The CCBs reside at addresses FF2018H (CCB0) and FF201AH (CCB1).

Figure 4-8. Chip Configuration 0 (CCR0) Register (Continued)

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4.5REMAPPING INTERNAL ROM

The 83C196EA has 8 Kbytes of ROM (FF2000–FF3FFFH). The upper 7-Kbyte section (FF2400–FF3FFFH) is used for storing application code and data; the lower 1-Kbyte section (FF2000–FF23FFH) stores boot code, chip configuration bytes (CCBs), and interrupt vectors.

To optimize your application, you may want to make the application data in FF2400–FF3FFFH accessible as near data in page 00H, while still allowing the application code to execute in page FFH. To accomplish this, set the REMAP bit (CCB1.2) when you program the CCBs, and hold EA# high during reset. This combination forces all accesses to FF2000–FF3FFFH to the internal ROM and “shadows” the contents of FF2400–FF3FFFH into page 00H. Mapping the ROM contents into both pages 00H and FFH allows you to access data and constants as near data and near constants in page 00H and execute code in page FFH.

The EA# input controls whether accesses to FF2000–FF3FFFH are directed to internal ROM or an external memory device. When accesses are directed to internal ROM, the REMAP bit (CCB1.2) controls whether the upper 7-Kbyte section (FF2400–FF3FFFH) of internal ROM is mapped into page FFH only or into both pages FFH and 00H. The REMAP bit is loaded from the CCB and the state of EA# is latched upon leaving reset; neither can be changed until the next reset. You can read IRAM_CON (Figure 4-3 on page 4-10) to determine the state of the EA# pin (bit 7 contains the complement of EA#) and read CCR1 (Figure 4-9) to determine the state of the REMAP bit.

NOTE

The EA# input is effective only for accesses to the internal ROM (FF2000– FF3FFFH). For accesses to any other location, the state of EA# is irrelevant. The REMAP bit is effective only for accesses to FF2400–FF3FFFH and only when EA# is inactive. When EA# is active, execution is external and the REMAP bit is ignored.

With EA# active, the REMAP bit (CCB1.2) is ignored. Accesses to FF2400–FF3FFFH are directed to external memory (1F2400–1F3FFFH). Data in this area must be accessed with extended instructions.

With EA# inactive and remapping disabled (CCB1.2 = 0), accesses to FF2400–FF3FFFH are directed to internal ROM (FF2400–FF3FFFH). Data in this area must be accessed with extended instructions.

With EA# inactive and remapping enabled (CCB1.2 = 1), you can access the contents of FF2400– FF3FFFH in two ways:

•in internal ROM (FF2400–FF3FFFH) using extended instructions, and

•in internal ROM (002400–003FFFH) using nonextended instructions. This makes the far data in FF2000–FF3FFFH accessible as near data.

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8XC196EA USER’S MANUAL

An advantage of remapping ROM is that it makes the data in ROM accessible as near data in internal memory page 00H. The data can then be accessed more quickly with nonextended instructions. An advantage of not remapping ROM is that the corresponding area in memory page 00H is available for storing additional near data.

The chip configuration 1 (CCR1) register controls the clock failure detection circuitry, deferred mode, and the watchdog timer, selects the 64-Kbyte or 2-Mbyte addressing mode, and controls whether the upper 7-Kbyte section of internal ROM (FF2400–FF3FFFH) is mapped into page FFH only or into both pages FFH and 00H.

†The CCRs are loaded with the contents of the chip configuration bytes (CCBs) after reset. Locate your CCBs at addresses FF2018H (CCB0) and FF201AH (CCB1).

Figure 4-9. Chip Configuration 1 (CCR1) Register

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The chip configuration 1 (CCR1) register controls the clock failure detection circuitry, deferred mode, and the watchdog timer, selects the 64-Kbyte or 2-Mbyte addressing mode, and controls whether the upper 7-Kbyte section of internal ROM (FF2400–FF3FFFH) is mapped into page FFH only or into both pages FFH and 00H.

†The CCRs are loaded with the contents of the chip configuration bytes (CCBs) after reset. Locate your CCBs at addresses FF2018H (CCB0) and FF201AH (CCB1).

Figure 4-9. Chip Configuration 1 (CCR1) Register (Continued)

4.6FETCHING CODE AND DATA IN THE 2-MBYTE AND 64-KBYTE MODES

When the microcontroller leaves reset, the MODE64 bit (CCB1.1) selects the 2-Mbyte or 64Kbyte mode. The mode cannot be changed until the next reset. (Typically, the CCBs are programmed once when our program is compiled and are not changed during normal operation.)

In 64-Kbyte mode, code must execute from page FFH and data must reside in page 00H. In 2- Mbyte mode, code can execute from any page. Data must reside in page 00H for nonextended instructions, but it can reside in any page for extended instructions. In either mode, data and constants that reside in page 00H are called near data and near constants. Data outside page 00H are called far data.

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