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8xC196EA microcontroller user's manual.1998.pdf
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8XC196EA USER’S MANUAL

EBMOVI

Extended interruptible block move. Moves a block of word data

 

from one memory location to another. This instruction allows you to

 

move blocks of up to 64K words between any two locations in the

 

address space. It uses two 24-bit autoincrementing pointers and a 16-

 

bit counter.

EBR

Extended branch. This instruction is an unconditional indirect jump

 

to anywhere in the address space.

ECALL

Extended call. This instruction is an unconditional relative call to

 

anywhere in the address space.

EJMP

Extended jump. This instruction is an unconditional relative jump to

 

anywhere in the address space.

ELD, ELDB

Extended load word, extended load byte. Loads the value of the

 

source operand into the destination operand. This instruction allows

 

you to move data from anywhere in the address space into the lower

 

register file.

EST, ESTB

Extended store word, extended store byte. Stores the value of the

 

source (left-most) operand into the destination (right-most)

 

operand. This instruction allows you to move data from the lower

 

register file to anywhere in the address space.

3.2ADDRESSING MODES

This section describes the addressing modes as they are handled by the hardware. An understanding of these details will help programmers to take full advantage of the architecture. Most software tools have features that simplify the choice of addressing modes. Please consult the documentation for your assembler or compiler for details.

The instruction set uses four basic addressing modes:

direct

immediate

indirect (with or without autoincrement)

indexed (short-, long-, or zero-indexed)

The stack pointer can be used with indirect addressing to access the top of the stack, and it can also be used with short-indexed addressing to access data within the stack. The zero register can be used with long-indexed addressing to access any memory location.

3-6

PROGRAMMING CONSIDERATIONS

Extended variations of the indirect and indexed modes support the extended load and store instructions. An extended load instruction moves a word (ELD) or a byte (ELDB) from any location in the address space into the lower register file. An extended store instruction moves a word (EST) or a byte (ESTB) from the lower register file into any location in the address space. An instruction can contain only one immediate, indirect, or indexed reference; any remaining operands must be direct references.

The examples in this section assume that temporary registers are defined as shown in Table 3-4.

 

Table 3-4. Definition of Temporary Registers

Temporary Register

Description

 

 

AX

word-aligned 16-bit register; AH is the high byte of AX and AL is the low byte

BX

word-aligned 16-bit register; BL is the low byte of BX

CX

word-aligned 16-bit register; CH is the high byte of CX and CL is the low byte

DX

word-aligned 16-bit register; DH is the high byte of DX and DL is the low byte

EX

double-word-aligned 24-bit register

3.2.1Direct Addressing

Direct addressing directly accesses a location in the 256-byte lower register file, without involving the memory controller. Windowing allows you to remap other sections of memory into the lower register file for direct access (see Chapter 4, “Memory Partitions,” for details). You specify the registers as operands within the instruction. The register addresses must conform to the alignment rules for the operand type. Depending on the instruction, up to three registers can take part in a calculation. The following instructions use direct addressing:

ADD

AX,BX,CX

; AX BX

+

CX

ADDB

AL,BL,CL

; AL BL

+

CL

MULB

AX,BL

;

AX

AX

× BL

INCB

CL

;

CL

CL

+ 1

3.2.2Immediate Addressing

Immediate addressing mode accepts one immediate value as an operand in the instruction. You specify an immediate value by preceding it with a number symbol (#). An instruction can contain only one immediate value; the remaining operands must be direct references. The following instructions use immediate addressing:

ADD

AX,#340

; AX AX +

340

PUSH

#1234H

; SP SP

-

2

 

 

; MEM_WORD(SP) 1234H

DIVB

AX,#10

;

AL

AX/10

 

 

;

AH

AX

MOD 10

3-7

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