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Diss / (Springer Series in Information Sciences 25) S. Haykin, J. Litva, T. J. Shepherd (auth.), Professor Simon Haykin, Dr. John Litva, Dr. Terence J. Shepherd (eds.)-Radar Array Processing-Springer-Verlag

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5. Systolic Adaptive Beamforming

201

which involves several independent constraints. Since the constraint pre-pro- cessor will, in general, produce a different transformed data matrix for each of the constraints, the whole computation, including QR decomposition, must be repeated for each constraint and the number of arithmetic operations required is O[L(p + 1)2] per sample time.

A much more efficient algorithm for computing the MVDR has been developed by Schreiber [5.34]. His method only requires O(p2 + Lp) arithmetic operations per sample time which corresponds to the minimum computational complexity; it is also known to be numerically stable. Schreiber's algorithm involves a number of steps each of which can be implemented efficiently on some form ofsystolic array. However, as pointed out by Bojanczyk and Luk [5.35], it is difficult to realize the complete algorithm in a fully pipelined fashion because it involves a back-substitution process. This leads, once again, to the type of basic problem discussed in Sect. 5.4.3.

In this section we shall show how Schreiber's algorithm may be implemented very efficiently on a single systolic array by avoiding the need for an explicit back-substitution processor [5.36]. The resulting MVDR array is both fully efficient and fully pipelined. It is also shown how the initialization stage required for Schreiber's algorithm may be carried out in a fully pipelined manner within the array.

5.8.1 Schreiber's Algoritbm

The MVDR problem may be summarized as follows: At each sample time tn' evaluate the a posteriori residuals

(5.181)

where x(tn ) is the p-element vector of (complex) signal samples received by the array at time tn and w(!)(n) is the p-element vector of (complex) weights which minimizes the quantity

 

(5.182)

subject to a linear equality constraint of the form

 

C(l)T w(!) = 11(1) •

(5.183)

In (5.182), we have assumed a similar notation to that used in Sect. 5.7 and so e(l)(n) denotes the residual vector associated with the lth look direction at time tn. From the discussion in Sect. 5.7 and in particular (5.127), it follows that the solution to this constrained least-squares minimization problem is given by

w(l)(n) = 11(1) M- 1 (n) c(I)*/C(I)T M- 1 (n) C(I)* ,

(5.184)

where M(n) is the (estimated) covariance matrix defined in (5.128).

202 T.J. Shepherd and J.G. McWhirter

Assuming that a QR decomposition has been carried out on the data matrix X(n) so that

Q(n) X(n) = [ R~n)] '

(5.185)

where R(n) is a p x p upper triangular matrix, it follows that

 

M(n) = RH(n) R(n)

(5.186)

and so R(n) is the Cholesky square root factor of the covariance matrix M(n). Equation (5.184) may therefore be written in the form

w{!) (n) -

Jl{!) R- 1(n) R-H(n) c(l»

-

Jl(I) R- 1(n)a(l)(n)

(5.187)

C(I)T R

1 (n) R

 

'----..".,---::---

-

H(n) c(l)* -

II a{!) (n) 112

 

where

(5.188)

It follows that the a posteriori residual at time tn is given by

(I)

_Jl(l)~{!)(n,n)

(5.189)

e

(n, n) -

II a(l)(n) 112 '

where

~(I)(n, n) = xT(tn)R-1(n)a(l)(n) = tpH(n)a(l)(n)

(5.190)

and

(5.191)

From (5.78) it can be seen that tp(n) is the vector component of Q(n) as defined in (5.60).

In Sect. 5.4 it was shown how the QR decomposition of X(n) may be implemented recursively on a triangular systolic array. The triangular matrix R(n - 1) is updated using an orthogonal transformation Q(n) as defined in (5.40). Schreiber's algorithm is based on the fact that the vector a(l)(n) can also be computed recursively. In the context of QR decomposition, this recursion may be derived as follows: From (5.188) it is clear that at time tn -1 ,

c(l» = RH(n - l)a(l)(n - 1)

(5.192)

5. Systolic Adaptive Beamforming

203

where v(I)(n - 1) is an arbitrary (n - p - 1)-element vector. Now since the matrix Q(n) is unitary, (5.192) may be expressed in the form

c''" ~P-' [pRH(n - 110, x'(t.)] l1"(n) Q(n) [:;:~~=:;]

(5.193)

and it follows from (5.40) that

(5.194)

As discussed in Sect. 5.5.2, the structure of Q(n) is such that we may write

(5.195)

(where d(l)(n) is a p-element vector to be determined), and so from (5.194) and (5.195) we obtain

c(I)· = p-2 R"(n) d(l) (n) .

(5.196)

It follows from the definition in (5.188) that

 

d(l)(n) = p2 a(l)(n)

(5.197)

and hence (5.195) constitutes a straightforward recursion which may be used to compute the updated vector a(l)(n). It also follows from (5.195) that

(5.198)

and this provides a simple recursive formula which could be used to update the denominator in (5.189). However, for reasons of numerical stability, it is preferred to compute the inner product a(I)"(n)a(l)(n) directly [5.34].

The recursive update in (5.195) may be implemented very simply using the type of triangular systolic array described in Sect. 5.4.3. Schreiber's algorithm proceeds by solving the triangular system of linear equations

(5.199)

forming the inner product ,,"(n)a(l)(n), and multiplying the result by the normalization factor fl.(I) / II a(/) (n) 112 . It is this part of the overall procedure which requires a back-substitution and proves to be awkward from the point ofview of

204 T.J. Shepherd and J.G. McWhirter

pipelining Schreiber's algorithm. In the following sub-section we will show how the entire algorithm may be pipelined on a single systolic array by avoiding the need for a separate processor to solve (5.199).

5.8.2 Systolic Array Implementation

In Sect. 5.4.3 it was shown how a systolic array of the type illustrated in Fig. 5.4 could be used in an efficient recursive manner to evaluate the sequence of a posteriori least-squares residuals e(n, n) as defined in (5.58) for a canonical adaptive combiner. The main triangular array ABC implements a sequence of Givens rotations in order to perform a recursive QR decomposition of the data matrix X(n) as described by (5.40). The right-hand column of cells applies an identical sequence of rotations to the vector yen) as defined in (5.41). The leastsquares weight vector wen) is then given by (5.27) and so the a posteriori residual may be expressed in the form

(5.200)

By comparing (5.41) and (5.195), it can be seen that if at time tn - 1 the vector u(n - 1) generated by the right-hand column of cells in Fig. 5.4 was replaced by the vector a(l)(n - 1) and the value of y(tn ) set equal to zero, then the vector tJ2a(l)(n) would be generated and stored in the right-hand column ofcells at time tn. Furthermore, by comparing (5.200) and (5.190) it can be seen that the output from the final cell F at time tn would be identically equal to - p2 ~(I)(n, n). The latter point can be proved directly by mUltiplying both sides of(5.195) by Q"(n) and noting that Q(n) takes the form given in (5.60). This leads to the equation

 

(5.201)

and, from (5.190), it follows immediately that

 

yen) 1X(I)(n) = - p2 ~(I)(n, n) .

(5.202)

The product of yen) and 1X(1)(n) would, of course, be the output from the final cell F at time tn. The process outlined above could obviously be continued in a simple recursive manner to generate the sequence of output residuals ~(I)(i, i) (i = n, n + 1, ... ). These considerations lead to the systolic array for MVDR beamforming which is illustrated in Fig. 5.16. It incorporates four types of cell whose processing functions are detailed in Fig. 5.17. The array comprises a basic triangular array ABC and L columns of cells on the right-hand side - one for each constraint. The MVDR computation is carried out in three distinct phases, the first two of which constitute a pipelined initialization procedure.

 

During the first phase, which corresponds to the first band of input data

in

Fig. 5.16, the first

n -

1

rows

of data {xT(t;) Ii = 1,2, ... n -

I} (where

n -

1 ~ p) are input

to

the

main

triangular array ABC in the

usual time-

staggered manner. The boundary and internal cells perform standard Givens

5. Systolic Adaptive Beamforming

205

RESIDUALS

'

,y~

'

 

CONSTRAINT POSTPROCESSOR

COLUMNS

Fig. 5.16. MVDR processor array. The shorthand notation Xn; for data x;(tn) is employed

rotations as defined by mode 1 of the procedures in Fig. 5.17. This mode is selected according to the value of a special control bit M associated with each input data sample, the mode control bit for all samples in the first band of input data being set to one. During the first processing phase, the basic triangular array ABC implements a QR decomposition of the initial data matrix X(n - 1) to produce the upper triangular matrix R(n - 1) which is stored within the array in the usual manner. A sequence of zeros is input to the rest of the array which performs no useful function during the first processing phase.

206

T.J. Shepherd and J.G. McWhirter

 

 

 

MODE 1 (If M- 1)

(a)

BOUNDARY CELL

( r'~ (B2r2 + IXinl2)i

 

(X in

,M)

If x.In - 0 then

'Yin~

( c ~ 1 ; s ~ 0 )

 

~(c ,5)

otherwise

 

 

(b)

INTERNAL CELL

r ~ S *xfn + cBr

(c ,.,+(C,.,

 

(X ln

,M)

 

 

(Xout

,M)

 

(c) CONSTRAINT CELL

a ~ S*xlnfB2 + cafB Aout ~ AIn + lal 2

(d) FINAL CELL

If Ain - 0 then

(X+in ')..in ,M)

'Y 'Y otherwise

xout

MODE 2 (If M- 0)

If x in - 1 then

( a ~ 5 * )

Fig. 5.17. MVDR processor cell instructions for square-root algorithm

During the second processing phase, which corresponds to the second band of input data in Fig. 5.16, the associated mode control bits are set to zero and all cells within the array operate in mode 2. For cells within the basic triangular array, mode 2 simply constitutes a non-adaptive or frozen version of mode 1 in

5. Systolic Adaptive Beamforrning

207

which the update of all stored values is suppressed. The input to the main triangular array during the second processing phase comprises the sequence of L time-staggered constraint vectors e(1), e(2), . •• elL) and so, as explained in Sect. 5.6.2, it serves to produce the corresponding sequence of output vectors.

a(l)*(n - 1) = R-T(n - l)e(l), (l = 1,2, ... , L)

(5.203)

as defined by (5.188). These emerge from the right-hand boundary of the main triangular processor and continue to move to the right at the rate of one cell per clock cycle across the L constraint post-processor columns. During the second phase of processing, the input to these columns from above takes the form of a unit diagonal matrix. The unit input associated with the lth column (l = 1, 2, ... , L) enters each cell within that column at the same time as the corresponding element of the vector a(l)*(n - 1). It serves to indicate that the complex conjugate of this element should be stored within the cell, where it remains unaltered during the remainder of the second processing phase. At the end of this phase the systolic array in Fig. 5.16 has clearly been initialized as appropriate for the recursive MVDR computation described above.

During the third phase of processing, which corresponds to band 3 of the input data in Fig. 5.16, the sequence of data vectors {x(ti)1 i = n, n + 1, ... } is input to the main triangular processor and zeros are fed into the remainder of the array as shown. All cells within the array receive a sequence of unit mode control bits and hence return to their first (adaptive) mode of operation. The mode 1 function for each cell in the constraint post-processor section DGHE includes an additional computation associated with the parameter A. This parameter is initialized to zero on entry to the array and serves to accumulate the normalisation term II a(I)(n) 112 associated with each constraint column on each cycle. The value of 11 in the final cell of the lth constraint column is set equal to 11(1) and so it follows from (5.189) that the output produced by this cell during the third phase of processing is the required sequence of residual values e(l)(i, i) (i = n, n + 1, ... ). This concludes our description of the basic systolic array for MVDR beamforming. The following sub-section is devoted to discussing how it may be modified to perform the same computation using square-root-free Givens rotations.

5.8.3 Square-Root-Free Minimum Variance Distortionless Response Algorithm

Figure 5.18 details the cell functions which are required when the systolic array in Fig. 5.16 is used to compute the MVDR by means of square-root-free Givens rotations. In their first mode of operation the boundary and internal cells perform essentially the same functions as those defined for the square-root-free least-squares processor in Fig. 5.5a. The second mode of operation for these cells simply constitutes, as before, a non-adaptive version of mode 1 in which the update of all stored quantities is suppressed. It is worth noting that for the square-root-free algorithm, this mode of operation can be selected very simply by setting the value of bin to zero (instead of unity) and the value of pto unity at

208 T.J. Shepherd and J.G. McWhirter

MODE 1 (If M- I)

(a)BOUNDARY CELL

 

 

 

(c ,5

 

 

 

,d' ,z)

(b)5

INTERNAL CELL

 

(x in

,M)

,5

,d'c,,z) -t(cr ,d' ,z)

 

(xout

,M)

 

If

(c

d'+-

~2d + 0ln lX ln l2

x in -

0 or

Din -

0

then

( c +- 1

; s+-O )

 

 

otherwise

 

 

 

 

~ ~2djd' '5 +- 0

In

x

in

jd')

 

,

 

 

 

xout

+- x.In- zr

r +-

5*x in + cr

(c) CONSTRAINT CELL

(x in

,>'in

,M)

 

~!.:!,+

~!.::,

hout +- h.In + d' lal 2

(xout ,>'out ,M)

(d) FINAL CELL

If hln - 0 then

( xout +- 0) otherwise

xout.

MODE 2 (If M- 0)

c~l ;5+-0

xout +- x.In - zr

If

x in

-

1 then

(

a

+-

z*jd' )

Fig. S.l8. MVDR processor cell instructions for square-root-free algorithm

the top boundary cell. However, for the sake ofclarity, this method has not been illustrated in Fig. 5.16.

In order to understand the operation ofthe constraint cells, it is important to realize that when square-root-free Givens rotations are used, the vector u(n) in

s. Systolic Adaptive Beamforming

209

(5.200) is represented in the form

 

u(n) = Dl/2(n) u(n) ,

(5.204)

where u(n) is the vector stored in the right-hand column, and D(n) is the diagonal matrix stored in the boundary cells of the array in Fig. 5.5a. It follows that, in order to perform the recursive update in (5.195), the ·lth constraint column in Fig. 5.16 must be initialized to store the vector a(l)(n - 1) rather than the vector a(l)(n - 1) where

(5.205)

However, from the discussion in Sect. 5.6.2, it can be seen that during the second processing phase of the square-root-free algorithm, when the systolic array in Fig. 5.16 operates in mode 2, the effect of inputting the time-staggered constraint vector C(l) is to produce the corresponding output vector

i(l)(n - 1) = jj-T(n -

l)c(l)

 

= D l /2(n -

l)R- T(n - l)c(l) = D(n - l)a(l)o(n - 1).

(5.206)

Clearly, this vector must be divided by the diagonal matrix D(n -

1) before it is

captured and stored by the lth constraint column and, since the diagonal matrix D(n - 1) is stored within the boundary cells, the associated parameter d' must be passed from left to right across each row ofcells together with the parameters c, sand z as indicated in Fig.5.1S.

In order to understand the operation of the square-root-free constraint cells, it is also important to appreciate that the recursion in (5.195) will produce an updated vector a(l)(n) stored in the lth constraint column and hence, in order to evaluate the normalization term II a(l)(n) 11 2, it is necessary to multiply this stored vector by the updated diagonal matrix Dl/2(n) in accordance with (5.206). This is achieved by making use once again of the associated parameter d' as indicated in Fig. 5.1S. In all other respects, the operation of both the constraint cells and the final cells in Fig. 5.1S may be deduced quite readily from that of the internal and final cells specified in Fig. 5.5a. It is also possible, of course, to design an MVDR processor based on the form of square-root-free Givens rotation defined in Fig. 5.5b, but, since this is a very obvious extension of the current discussion, it will not be detailed here.

Finally, in this section, we should like to draw attention to the array proposed by Yang and Bohme [5.37]. This processor employs an algorithm similar to the one described above, but results in a linear array implementation, and is thus not pipelined. For further extensions of their work, the reader is referred to Sect. 5.11.

210 T.J. Shepherd and J.G. McWhirter

5.9 Adaptive Antenna Processor Test-Bed

So far, the discussion of systolic adaptive beamforming in this chapter has been entirely theoretical apart from the brief presentation of some computer simulation results. In this section, however, we will describe an adaptive antenna processor test-bed incorporating the type of triangular processor array in Fig. 5.5. This was recently constructed by a team of engineers at STC Telecommunications Ltd (STL) working in collaboration with scientists at the Royal Signals and Radar Establishment [5.38]. The main purpose of the project was to demonstrate the systolic/wavefront array approach to adaptive beamforming in a real system environment. As illustrated in Fig. 5.19, the adaptive antenna processor test-bed comprises two main subsystems:

1)The antenna unit and RF/IF front-end subsystem, comprising a six-element antenna array operating at 1290 MHz and a six-channel modular RF/IF receiver.

2)The digital processor subsystem comprising zero-IF receivers and analogue- to-digital (A/D) conversion, the adaptive beamforming array, a system timing and control processor interface, and dual output digital-to-analogue (D/A) converters.

In the following sub-section we will discuss the specification and construction of the adaptive beamforming array. This was designed to operate as a wavefront array, the principles of which were outlined in Sect. 5.2.2. We believe that it was, in fact, the first working demonstration of a Wavefront Array

ANTENNA

.

RF/IF UNIT

1-·

PROCESSOR SUBSYSTEM

. . . .-.-.-. .

]

 

 

,

_·_·__·_-_·_--.-.---.--.--.-.------.-----.-.-.----.-----

- _.- -'-'- -.---., --.-----

.-.-.---.-.-.--.-.~

 

 

 

 

~--

+-~~~J--

t--

~~~~

D/A

;: ANALOG

 

 

 

 

 

TWAP

INTFC.

OlIT

 

 

 

 

 

 

 

~

SYSTEM TIMING/CONTROL/INTFC.

REAL

TIME

INTERFACE

TRANS

 

Fig. 5.19. Schematic diagram of components for adaptive antenna processor test-bed