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362

16

Synchronous Machine Regulators

Regulator

Exciter

Machine

Δvref +

Δvh

K0

1

1

Δvh

1 + sT0

1 + sTe

1 + sTd0

 

 

 

 

Fig. 16.6 Basic functioning of the primary voltage control

Fig. 16.7 Primary voltage control root loci

Each AVR model has two algebraic equations, as follows:

0

= v˜f − vf

(16.9)

0

= v0ref − vref

(16.10)

where (16.9) represents the link in between the AVR and the synchronous machines, being vf the algebraic variable that defines the synchronous machine field voltage, i.e., (16.9) substitutes (15.8). Equation (16.10) defines the AVR reference voltage. It is useful to define the reference voltage as a variable since other devices such as over-excitation limiters or power system stabilizers modify such reference with additional signals. Thus, (16.10) allows interfacing other regulators to the AVR. Furthermore, the bus voltage measure delay is usually modelled as a lag block:

v˙m = (vh − vm)/Tr

(16.11)

16.2 Automatic Voltage Regulator

363

where vh is the generator bus voltage or any bus voltage regulated by the AVR, vm is the state variable used as voltage signal within the AVR and Tr the measurement block time constant. Equations (16.9)-(16.11) constitute the common equations of AVR models and can be included in a base AVR class.

The reference voltage v0ref is initialized after the power flow analysis and after the initialization of synchronous machines. In case the violations of AVR limits, the data of the static generator used in power flow analysis are not consistent with the AVR data and, thus, AVR state variables cannot be correctly initialized.

16.2.1Automatic Voltage Regulator Type I

The AVR Type I depicted in Figure 16.8 represents a typical dc exciter model. The DAE system is (16.9)-(16.11) and:

v˙r1 = (Ka(vref − vm − vr2

Kf

v˜f ) − vr1)/Ta

(16.12)

Tf

v˙r2 = (

Kf

v˜f + vr2)/Tf

Tf

˙

= vf (Ke + Sevf )) − vr1)/Te

v˜f

where vh is the generator terminal voltage or a remote-bus regulated voltage and the ceiling function Se is:2

Sevf ) = AeeBe |v˜f |

(16.13)

This model is a simplified version of the classic IEEE type DC1 [145]. The IEEE DC1 system includes an additional lead-lag block before the amplifier block. However, this lead-lag block is often neglected. The amplifier state variable vr1 is subjected to an anti-windup limit. Table 16.3 defines all parameters of AVR Type I.

2The coe cients Ae and Be can be determined by measuring two points of the ceiling function Se. Typically, one knows the values Semax and Se0.75·max that correspond to the field voltages vfmax and 0.75 · vfmax, respectively. To compute Ae and Be , one has to solve the following system:

0 = (1 + Semax)vfmax + vrmax

Semax = AeeBe vfmax

Se0.75·max = AeeBe ·0.75·vfmax

where Semax, Se0.75·max, vfmax, and vrmax are given values.

364

16 Synchronous Machine Regulators

 

 

 

 

 

 

 

Se

 

 

 

 

 

 

vrmax

 

 

 

 

 

 

 

Amplifier

 

 

 

 

vref

+

+

 

Ka

vr

1

v˜f

 

 

Tas + 1

 

+

Tes + Ke

 

 

 

 

 

 

 

 

 

vm

 

 

 

 

 

Exciter

 

 

 

 

 

 

 

 

 

 

1

 

 

vrmin

Stabilizing feedback

 

 

 

Tr s + 1

 

 

 

 

Kf s

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tf s + 1

 

 

Measure

 

 

 

 

 

 

 

 

 

vh

 

 

 

 

 

 

 

Fig. 16.8 Automatic voltage regulator Type I control diagram

Table 16.3 Automatic voltage regulator Type I parameters

Variable

Description

Unit

 

 

 

-

Generator code

-

-

Regulated voltage code

-

Ae

1st ceiling coe cient

-

Be

2nd ceiling coe cient

1/pu

Ka

Amplifier gain

pu/pu

Ke

Field circuit integral deviation

-

Kf

Stabilizer gain

s pu/pu

Ta

Amplifier time constant

s

Tf

Stabilizer time constant

s

Te

Field circuit time constant

s

Tr

Measurement time constant

s

vrmax

Maximum regulator voltage

pu

vrmin

Minimum regulator voltage

pu

16.2.2Automatic Voltage Regulator Type II

The AVR Type II is shown in Figures 16.9 and 16.10. This AVR models a typical static exciter which is characterized by higher gains and faster response than the previous dc exciter. The DAE system is (16.9)-(16.11) and:

v˙r1

 

 

 

 

T2

 

 

 

 

 

 

= (K0(1

 

)(vref − vm) − vr1)/T1

(16.14)

T1

v˙r2

 

T4

 

 

 

 

 

T2

 

= ((1

 

)(vr1 + K0

 

 

(vref − vm)) − vr2)/T3

(16.15)

T3

T1

 

 

T4

 

 

 

 

T2

 

vˆr = vr2 +

 

(vr1

+ K0

 

(vref − vm))

(16.16)

T3

T1

16.2 Automatic Voltage Regulator

365

vr =

vˆr

if vrmin

 

vˆr

 

vrmax,

(16.17)

 

 

vmax

if vˆr > vmax,

 

 

 

 

r

 

 

r

 

 

 

 

 

min

 

min

 

 

v˜˙f =

vr

if vˆr < vr .

 

(16.18)

vf (1 + Sevf ))

 

vr )/Te

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

where where vh is the generator terminal voltage or a remote-bus regulated voltage and Se is the ceiling function (16.13). For high values of the gain K0, the state variable vr2 takes also high values. To keep the values of vr1 and vr2 comparable, the following variable change is used:

v˜r2 = vr2 K0

Hence, (16.15) and (16.16) can be rewritten as follows:

˙

 

T4

 

 

 

 

T2

ref

 

v˜r2

= ((1

 

)(vr1 + K0

 

 

(v

 

− vm)) − K0v˜r2)/(K0T3)

T3

T1

 

vˆr = K0v˜r2 +

 

T4

(vr1

+ K0

T2

(vref − vm))

 

T3

T1

Table 16.4 defines all parameters required by the AVR Type II.

(16.19)

(16.20)

(16.21)

Se

vrmax

vref +

 

(T2s + 1)(T4s + 1)

 

vˆr

vr

 

1

 

v˜f

 

 

 

 

 

 

 

 

K0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(T1s + 1)(T3s + 1)

 

 

 

+

 

 

 

Tes + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vm

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vrmin

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tr s + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vh

Fig. 16.9 Automatic voltage regulator Type II control diagram

366

16 Synchronous Machine Regulators

vref − vm

K0

K0T2/T1

 

 

 

+

 

 

 

T4/T3

 

 

 

 

+ vr

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 − T2/T1

 

 

 

 

 

 

 

1 − T4/T3

 

 

 

 

 

 

(T1s + 1)

 

vr1

 

 

 

(T3s + 1)

 

 

vr2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 16.10 Detail of the double lead-lag block of AVR Type II

Table 16.4 Automatic voltage regulator Type II parameters

Variable

Description

Unit

 

 

 

-

Generator code

-

-

Regulated voltage code

-

Ae

1st ceiling coe cient

-

Be

2nd ceiling coe cient

1/pu

K0

Regulator gain

pu/pu

T1

1st pole

s

T2

1st zero

s

T3

2nd pole

s

T4

2nd zero

s

Te

Field circuit time constant

s

Tr

Measurement time constant

s

vrmax

Maximum regulator voltage

pu

vrmin

Minimum regulator voltage

pu

16.2.3Automatic Voltage Regulator Type III

The AVR Type III depicted in Figure 16.11 is a simple model that can be useful for simplified stability studies. The DAE system is (16.9)-(16.11) and:

v˙r = (K0(1

T1

 

 

 

 

 

 

 

 

)(vref − vm) − vr )/T2

 

 

(16.22)

T2

 

 

˙

 

 

T1

 

ref

 

 

vh

 

v˜f = ((vr

+ K0

 

(v

 

− vm) + vf 0)(1 + s0

(

 

1)) − v˜f )/Te

T2

 

v0

where vh is the generator terminal voltage or a remote-bus regulated voltage. The initial field voltage vf 0 and bus voltage v0 are set during the synchronous machine initialization step. The field voltage v˜f is subjected to an anti-windup limiter. Table 16.5 defines all parameters required by the AVR Type III. If s0 is set to 1, the signal vh/v0 is enabled.

16.2

Automatic Voltage Regulator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

367

 

 

 

 

 

 

 

 

 

 

 

 

 

1/v0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vfmax

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

s0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vm

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vh

1

 

K0

T1s + 1

 

 

 

 

 

 

 

 

 

 

 

1

 

 

v˜f

 

 

Tr s + 1

 

 

 

+

 

 

T2s + 1

 

 

 

+

 

 

 

 

 

 

 

Tes + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vref

 

 

 

 

 

 

 

 

 

 

vf 0

 

 

 

 

 

 

vfmin

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 16.11 Automatic voltage regulator Type III control diagram

 

 

Table 16.5 Automatic voltage regulator Type III parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Variable

Description

 

 

 

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-

 

 

 

Generator code

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

-

 

 

 

Regulated voltage code

-

 

 

 

 

 

 

 

 

 

 

K0

 

Regulator gain

 

 

 

 

pu/pu

 

 

 

 

 

s0

 

Bus voltage signal

 

 

 

 

{0, 1}

 

 

 

 

 

 

 

 

 

T1

 

Regulator zero

 

 

 

 

 

 

 

s

 

 

 

 

 

T2

 

Regulator pole

 

 

 

 

 

 

 

s

 

 

 

 

 

Te

 

Field circuit time constant

 

 

 

s

 

 

 

 

 

Tr

 

Measurement time constant

 

 

 

s

 

 

 

 

 

vfmax

 

Maximum field voltage

 

pu

 

 

 

 

 

vfmin

 

Minimum field voltage

 

pu

 

 

Example 16.2 E ect of Automatic Voltage Regulation on Synchronous Machine Bus Voltage

Figure 16.12 shows the e ect of the automatic voltage regulation on the bus voltage of synchronous machine 1 of the IEEE 14-bus system. The transient refers to line 2-4 outage at t = 1 s. As expected, the system without primary voltage regulation does not recover the desired voltage values after the disturbance.

Figure 16.14 shows the transient following the same disturbance but with a 20% load increase.3 For this loading level, the line outage leads to an unstable equilibrium point, as shown in Figure 16.13. In fact, as discussed in Example 8.9 of Chapter 8, a Hopf bifurcation occurs when increasing the loading level. In summary, the response of the system without AVRs is poor but, depending on the loading level, the inclusion of AVRs can lead to instability. Thus, it is required to include additional controllers to improve the system transient behavior. A solution is provided by power system stabilizers that are described in the following section.

3Loads are modelled as constant powers and are switched to constant impedances for low bus voltage magnitude, i.e., vh < 0.8 pu.

368

16 Synchronous Machine Regulators

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 16.12 E ect of automatic voltage regulation on synchronous machine bus voltage for the IEEE 14-bus system (100% loading level)

Fig. 16.13 Eigenvalue loci for 120% loading level and line 2-4 outage for the IEEE 14-bus system

16.3 Power System Stabilizer

369

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 16.14 E ect of automatic voltage regulation on synchronous machine bus voltage for the IEEE 14-bus system (120% loading level)

16.3Power System Stabilizer

Power System Stabilizers (PSSs) are used for damping power system oscillations. Although several PSS models have been proposed in the literature, the rationale behind the PSS functioning is the same for all control schemes. To explain the basic functioning of PSSs, consider a simple electromechanical model of the synchronous machine with no damping:

2H

= pm − pe(δ)

(16.23)

 

dt

where:

eq vh

 

 

pe(δ) =

sin(δ − θh)

(16.24)

xd

di erentiating the above expression and assuming a constant mechanical power pm leads to:

2HsΔω =

∂pe

 

∂pe

Δeq

 

∂pe

 

(16.25)

 

Δδ −

 

 

 

Δvh

∂δ

∂eq

∂vh

If eq and vh are constant, one has:

 

 

 

 

 

 

 

 

2HsΔω =

∂pe

 

Δδ = −kΔδ

 

(16.26)

∂δ

 

 

370

 

16

Synchronous Machine Regulators

where

eq vh

 

 

 

k =

cos(δ0

− θ0)

(16.27)

xd

Since Δω = sΔδ:

 

 

 

 

2Hs2Δδ + kΔδ = 0

(16.28)

which has a pair of pure complex eigenvalues (no damping):

 

λ1,2 = ±j

 

 

2H

 

 

 

(16.29)

 

 

 

 

 

 

k

 

 

 

 

The PSS allows imposing

Δvh = k1Δδ

 

 

(16.30)

 

 

 

Hence, one has:

 

 

 

 

 

 

 

 

 

 

 

 

2HsΔω = −kΔδ − kω sΔδ

(16.31)

where

 

 

∂pe

 

 

 

 

 

kω = k1

 

 

(16.32)

 

∂eq

 

 

 

 

 

 

 

 

and, finally:

 

 

 

 

 

 

 

 

 

 

 

 

2Hs2Δδ + kω sΔδ + kΔδ = 0

(16.33)

which has a pair of complex eigenvalues with negative real part:

 

λ1,2

= 4H ± j

 

 

 

 

 

(16.34)

 

4H

ω

 

 

kω

 

 

 

8kH

k2

 

In practice (16.30) is obtained by introducing a feedback signal proportional to the active power or rotor frequency into the primary voltage control loop. Typical PSS input signals are the rotor speed ω, the active power ph and also the bus voltage vh of the generator to which the PSS is connected through the automatic voltage regulator. The PSS output signal is a signal vs that modifies the reference voltage vref of the AVR.

In the following subsections, four typical PSS models are described. Except for the simple model described in Subsection 16.3.1, other models have two algebraic equations, as follows:

0 = gs(xi, yˆi) − vs

(16.35)

0 = vref0 − vref + vs

(16.36)

where (16.35) defines the PSS signal vs, and (16.36) sums the signal vs to the AVR reference voltage (see also (16.10)). All PSS parameters used in the following subsections are defined in Table 16.6.

16.3 Power System Stabilizer

371

 

Table 16.6 Power system stabilizer parameters

 

 

 

 

 

 

Variable

Description

Unit

 

 

 

 

 

 

-

AVR code

-

 

 

Kp

Gain for active power

pu/pu

 

 

Kv

Gain for bus voltage magnitude

pu/pu

 

 

Kw

Stabilizer gain

pu/pu

 

 

T1

First stabilizer time constant

s

 

 

T2

Second stabilizer time constant

s

 

 

T3

Third stabilizer time constant

s

 

 

T4

Fourth stabilizer time constant

s

 

 

vsmax

Max stabilizer output signal

pu

 

 

vsmin

Min stabilizer output signal

pu

 

 

Tw

Wash-out time constant

s

 

16.3.1Simplified Power System Stabilizer Model

According to the qualitative discussion above, the simplest PSS model is obtained by introducing in the synchronous machine equations a feedback signal that modifies the field voltage:

v˜f = vf + Kω (ω − ωs) − KP (ph(xi, vh, θh) − p0)

(16.37)

where p0 is the initial electric power generated by the machine. The modified field voltage v˜f can substitute vf in equations (15.13), (15.16), (15.19), (15.22), (15.24), (15.27), (15.29), (15.31) or (15.33) defined in Section 15.1 of Chapter 15.

16.3.2Power System Stabilizer Type I

PSS Type I is depicted in Figure 16.15, and is described by the following di erential equation:

v˙1

= (Kwω + Kpph + Kv vh + v1)/Tw

(16.38)

vs = Kw ω + Kpph + Kv vh + v1

 

where ω, ph and vh are the rotor speed, the active power and the voltage magnitude of the generator to which the PSS is connected through the AVR.

16.3.3Power System Stabilizer Type II

The PSS Type II is depicted in Figure 16.16, and is described by the equations: