Cadence / DSD 4 / EE560_DynLog

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EE 560 DYNAMIC LOGIC CIRCUITS

Kenneth R. Laker, University of Pennsylvania

ADVANTAGES:

1.Allows implementation of simple sequential circuits with memory functions.

2.Use of common clock signals throughout the system enables the syncronization of various circuit blocks.

3.Implementation of complex functions genearlly use less die area than static circuits.

4.Often dissipates less dynamic power than static designs, due to smaller parasitic capacitances.

Kenneth R. Laker, University of Pennsylvania

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EXAMPLE 9.1:

Consider the following depletion nMOS dynamic D-latch circuit:

CK = 1: MP turns ON. Cx is charged up or down through MP depending on the input D voltage level. Q = D.

CK = 0: MP turns OFF, and Cx is isolated from input D. Q is determined by charge stored on Cx during previous CK = 1.

Kenneth R. Laker, University of Pennsylvania

During CK = 1: Let D = 1, i.e. VD = VOH = VDD. MP is conducting and charges Cx to a “weak 1”(i.e. Vx = VDD - VT,driver). M1 is ON: Vy = VOL < VT,driver => M3 is OFF: VQ = VDD or Q = 1.

During CK = 0: Logic-level Vx is preserved through charge storage on Cx. However, Vx starts to drop due to leakage.

WHAT IS THE MINIMUM Vx NEEDED TO KEEP Q = 1 WHEN CK = 0?

Kenneth R. Laker, University of Pennsylvania

NOTE: for VQ = VDD, M3 must be OFF => Vy = VOL < VT,driver = 1.0 V, i.e. M1 is in LIN region and M2 is in SAT.

Assume that Vy = VT0,drive = 1 V, i.e. just small enough to keep M3 OFF

Kenneth R. Laker, University of Pennsylvania

Assume that Vy = VT0,drive = 1 V, i.e. just small enough to keep M3 OFF

VT,load = VT0,load+ γ(|2φF |+ Vy − |2φF |)

= −3V+ 0.37V1/2 (0.6V+ 1.0V − 0.6V) = -2.84 V Using the current Eq, solve for Vx, i.e.

(0.5)(+2.84)2 = (2)(2(Vx − 1.0V)1.0 − (1.0)2 ) => Vx = 2.51 V

i.e. Vx can drop from VDD to 2.51V due to charge leakage, before VQ is effected (i.e. the output changes state)

Kenneth R. Laker, University of Pennsylvania

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BASIC PRNCIPLES OF PASS TRANSISTOR CIRCUITS

VDD

Kenneth R. Laker, University of Pennsylvania

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Cx dVdtx = k2n (VDD - Vx - VT,MP )2

Integrating t from 0 -> t and Vx from 0 -> Vx, and neglecting the substrate bias effect i.e.

Kenneth R. Laker, University of Pennsylvania

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Vmax = Vx(t)|t = ∞ = VDD - VT,MP

Vmax = VDD − VT0,MP− γ(|2φF |+ Vmax − |2φF |)

Body Effect: Reduces Vx and Increases tcharge

Kenneth R. Laker, University of Pennsylvania

Propogation of logic “1” in Pass Transistor Strings (impact of weak “1” propogation)