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Файл:Для магистратуры / Lecture 1 - Introduction.pdf
Programmable Logic Devices
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PLA |
PROM |
PAL |
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Introduction & Trends |
Introduction to Digital Integrated Circuit Design |
Lecture 1 - 33 |
EPLD Block Diagram
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Primary inputs |
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Macrocell |
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Courtesy Altera Corp.
Introduction & Trends |
Introduction to Digital Integrated Circuit Design |
Lecture 1 - 34 |
Field-Programmable Gate Arrays Fuse-based
I/O Buffers
Program/Test/Diagnostics
Vertical routes
Standard-cell like floorplan
I/O Buffers |
I/O Buffers |
Rows of logic modules
Routing channels
I/O Buffers
Introduction & Trends |
Introduction to Digital Integrated Circuit Design |
Lecture 1 - 35 |
Interconnect
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Programmed interconnection |
Input/output pin |
Cell
Antifuse
Horizontal tracks
Vertical tracks
Programming interconnect using anti-fuses
Introduction & Trends |
Introduction to Digital Integrated Circuit Design |
Lecture 1 - 36 |