- •Suleyman demirel university
- •Contents
- •Preface
- •Preliminaries 1. Resistors’ colored codes.
- •Preliminaries 2. Measurements with digital multimeter.
- •Laboratory work # 1. Diode applications
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •Laboratory work # 2. Realization of logic gates with transistors.
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •A. On, on, on b. On, on, off c. Off,on, off
- •A. 1 p-n-junction b. 2 p-n-junctions c. 3 p-n-junctions
- •A. On, on, on b. On, on, off c. Off,on, off
- •A. On, on, on b. On, off, off c. Off,on, off
- •Laboratory work # 3. Logic gates.
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •A. 1 b. 2 c. 3 d. 4 e. 5
- •A. Xor b. Xnor c. Nor d. Nand e. And
- •5. Nor is dual to a. Xor b. Xnor c. Nor d. Nand e. And
- •6. Or is complement to a. Xor b. Xnor c. Nor d. Nand e. And
- •A.1 b.2 c.3 d.4 e 5
- •Laboratory work # 4. Seven-segment displays
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •A. Makes the several systems compatible b. Makes the two systems compatible c. Makes the two systems compatible even though each uses a different binary code
- •A. 0,0,1 b.1,0,1 c.1,1,0 d.0,1,0 e. 0,1,1
- •Laboratory work # 5. Four-bit binary parallel adder.
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •A. Binary numbers b. Binary variables
- •A.Sequential; three
- •Test questions
- •A.Sequential; three b. Sequential; two c. Combinational; two d. Combinational; three e. Sequential or combinational; three
- •E. The sum of two bits and a previous carry, … the sum of two bits
- •Lab work performance.
- •Test questions
- •A. 1 b. 2 c. 3 d. 4 e. 5
- •A. Xor b. Xnor c. Nor d. Nand e. And
- •Laboratory work # 8. Decoder and demultiplexer.
- •Preparation to lab work.
- •Lab work performance.
- •Table #1
- •Table #2
- •Test questions
- •E. Converts binary information from n input lines to m output lines
- •Laboratory work # 9. Encoder.
- •Preparation to lab work.
- •What discrepancy may be for this scheme? lab work performance.
- •Test questions
- •Laboratory work # 10.
- •Test questions
- •A. Enable input of decoder b. Disable input of decoder
- •E. Disable input of multiplexer
- •Laboratory work # 11. D- flip-flop.
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
- •A. Rs and clocked rs b.Rs or clocked rs c. D d. Jk e. T
- •A. Rs b. Clocked rs c. D d. Jk e. T
- •A. An expression to describe next state of the circuit
- •A. 1 b. 2 c. 3 d. 4 e. 5
- •Lab work performance.
- •Test questions
- •E. Decoder with enable can be used as multiplexer
- •A. 0000, 0001, 0010, 0011 b. 0000, 1000, 1100, 1110 c. 0000, 1000, 1001, 1010 d. 0000, 1000, 0001, 1001 e. 0000, 0001, 1000, 1001
- •A. 1, 0, 1
- •Test questions
- •A. A, c, d, e, f, g b. A, c, d, e, f c. A, b, c, f, g d. C, d, e, f, g e. A, b, c, d, e, f
- •A. To make a device active b. To provide the normal device’s operation
- •Laboratory work # 14. Bidirectional shift register.
- •Preparation to lab work.
- •Lab work performance.
- •Test questions
Test questions
1. The truth table for AND gate is:
A |
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B |
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C |
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D |
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E | ||||||||||
X |
y |
F |
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x |
y |
F |
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x |
y |
F |
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x |
y |
F |
|
x |
y |
F |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
0 | ||||
0 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
1 |
1 | ||||
1 |
0 |
0 |
1 |
0 |
1 |
1 |
0 |
1 |
1 |
0 |
0 |
1 |
0 |
1 | ||||
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
0 |
1 |
1 |
0 |
2. Typical voltage for IC TTL logic family for negative logic is for HIGH -_____V, for LOW-_____V. A. 0.2, 3.5 B. 3.5, 0.2 C. 5, 0 D. 0, 5 E. 0, 3.5
3. Power dissipation is
A. the power consumed by the gate
B. the power consumed by the gate, which must be available from the power supply
C. the power consumed by the gate, which may be available from the power supply
D. the power emitted by the gate
E. the power emitted by the gate, which may be available for the gates of the next level
4. 7485 is
A. 3*8 decoder B. 4-bit magnitude comparator C. Code converter
D. D flip-flop E. priority encoder
5. The circuit below is
A. combinational B. sequential C. combinational, because it hasn’t any flip-flops
D. sequential, because it has a feedback path
E. sequential, because it has a feedback path between output and input
6. Function # _____ corresponds to function NOR of 3 variables.
X |
y |
z |
F1 |
F2 |
F3 |
F4 |
F5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |
1 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
A. 1 b. 2 c. 3 d. 4 e. 5
7. XY´+X´Y is algebraic expression of ________ function.
A. Xor b. Xnor c. Nor d. Nand e. And
8. For 4-bit magnitude comparator if A>B function _________ must be realized (xi=AiBi+A`iB`i).
A. A2B`2+ x2A1B`1+ x2x1A0B`0
B. A`2B2+ x2A`1B1+ x2x1A`0B0
C. A3B`3+ x3A2B`2+ x3x2A1B`1+ x3x2x1A0B`0
D. A`3B3+ x3A`2B2+ x3x2A`1B1+ x3x2x1A`0B0
E. all answers are wrong
9. What statement is correct?
A. Tabulation method is not applicable for functions of 4 variables
B. Number of different functions of two variables is equal to 8.
C. NOT is a binary operator
D. 4-bit magnitude comparator can be used for comparison of two BCD numbers.
E. Decoder with enable can be used as multiplexer
10. To answer the question if two 4-bit binary numbers are equal each other for the circuit it is enough to use __________
A. 4XOR gates B. 4XNOR gates
C. 4XOR gates and one AND gate D. 4XNOR gates and one 4-input AND gate
E. 4XNOR gates and one 4-input OR gate
Laboratory work # 8. Decoder and demultiplexer.
Aims: investigate operation of the 2*4 decoder with enable as a decoder and as a demultiplexer.