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19.4 Static Synchronous Series Compensator

423

Table 19.5 Current-injection STATCOM parameters

 

 

 

 

 

 

Variable

Description

Unit

 

 

 

 

 

 

 

Kr

Regulator gain

pu/pu

 

 

imax

Maximum current

pu

 

 

imin

Minimum current

pu

 

 

Tr

Regulator time constant

s

 

19.3.4STATCOM Initialization

Dynamic STATCOM devices can be initialized using a static PV generator with pG0 = 0 (similarly to the SVC device), or using the power flow model described in the previous Subsection 19.3.3, which can be viewed as a PV generator behind an impedance.

Example 19.2 Comparison of STATCOM Models

Figure 19.10 shows the transient behavior of the detailed STATCOM model described in Subsection 19.3.1 as well as that of the simplified STATCOM model described in Subsection 19.3.2. The plot was obtained substituting the static shunt admittance at bus 9 of the IEEE 14-bus system for the detailed or the simplified STATCOM models. All data are given in Appendix D. The reference voltage of the STATCOM regulators is vref = 1.0563 pu, i.e., the same voltage value as obtained by the power flow analysis using the static shunt admittance. The detailed model behaves similarly to the SVC Type I, whereas the simplified model behaves similarly to the SVC Type II (see Figure 19.4). High frequency oscillations shown by the detailed model are due to the interaction between the VSC control and the dc circuit dynamic. Furthermore, due to fast dc dynamics, the numerical integration requires a relatively small step length for the detailed STATCOM model.

19.4Static Synchronous Series Compensator

The Static Synchronous Series Compensator (SSSC) is a series-connected VSC-based FACTS device that regulates the active power flow between the two ac buses to which it is connected. The e ect is similar to the TCSC device or the phase-shifting regulating transformer, but the internal model is rather di erent, as discussed in the following sections.

424

 

 

 

19 FACTS Devices

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 19.10 Comparison of STATCOM models for the IEEE 14-bus system

19.4.1Detailed Model

The detailed model consists of a series-connected VSC device with a capacitor on the dc side (see Figure 19.11). The model is composed of three parts, namely the dc network, the VSC and the controllers.

 

vh θh

vk θk

 

 

 

 

 

 

 

ph + jqh

 

 

 

pk + jqk

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

h

 

k

+

vdc

Fig. 19.11 SSSC scheme

19.4 Static Synchronous Series Compensator

425

Dc network : The dc side is a parallel RC defined by (17.10) and (17.2). Furthermore, the dc network must contain two nodes, one of which is connected to the ground. The VSC and the RC element are connected in parallel to the dc nodes.

Series-connected VSC model : The equations of the VSC are (17.2), (18.9)- (18.11) and (18.13).

Regulators: The control system is then used for controlling the dc voltage vdc and the active power ph or current flow ih in the ac side. Figure 19.12 depicts the dc voltage control, the active power control and the measurement transfer functions, which are described by the following DAE system:

v˙dcm = (Kdcvdc − vdcm )/Tdc

(19.21)

α˙ =

 

KP

vdcm + KI vdcref

KP Kdc

 

 

 

− KI

 

 

vdc

 

Tdc

Tdc

p˙acm = (Kacph − pacm )/Tac

 

 

 

a˙ m = T2

−KDam

+ K(pref − pacm ) T2Tac (Kacph − pacm )

 

1

 

 

 

 

KT1

where all parameters are defined in Table 19.12. Both the firing angle α and the modulating amplitude am undergo windup limiters. The active power signal in the firing angle control diagram can be substituted by the current ih.

vdc

Kdc

vdcm

 

 

 

 

 

 

Tdcs + 1

 

+

vdcref

ph

 

 

pacm

 

(ih )

Kac

 

(iacm )

 

 

Tacs + 1

 

 

 

+

pref

(iref)

αmax

KP s + KI

α

s

αmin

amaxm

K(T1s + 1)

am

T2s + KD

aminm

Fig. 19.12 SSSC control diagrams

426

 

19 FACTS Devices

 

 

Table 19.6 SSSC regulator parameters

 

 

 

 

 

 

 

 

 

 

Variable

Description

Unit

 

 

 

 

 

 

 

K

Gain of the ac voltage control

pu/pu

 

 

Kac

Gain of the ac measurement

pu/pu

 

 

KD

Integral deviation of the ac voltage control

-

 

 

 

Kdc

Gain of the ac measurement

pu/pu

 

 

KI

Integral gain for the α control

rad/pu/s

 

 

KP

Proportional gain for the α control

rad/pu

 

 

pref (iref)

Ac reference power (current)

pu

 

 

T1

Transient time constant of the ac control

s

 

 

 

 

 

T2

Time constant of the ac control

s

 

 

Tac

Time constant of the ac measurement

s

 

 

Tdc

Time constant of the dc measurement

s

 

 

vref

Dc reference voltage

pu

 

 

dc

 

 

 

 

19.4.2Simplified Dynamic Model

Simplified SSSC dynamic models have been proposed in [162, 193, 288] where the SSSC is represented by a series voltage source v¯S , as depicted in Figure 19.13. The voltage v¯S is in quadrature with line current. Thus, the voltage magnitude vS is the only controllable variable. The total active and reactive power flows in a transmission line in series with a SSSC device are:

where xhk and:

vhvk

sin(θh − θk )

 

ph = (1 + c) xhk

(19.22)

pk = −ph

qh = (1 + c) vh (vh − vk cos(θh − θk )

xhk

qk = (1 + c) vk (vk − vh cos(θh − θk )

xhk

is the series reactance of the transmission line assumed loss-less

c =

 

 

vS

(19.23)

 

 

 

vh2 + vk2

2vhvk cos(θh − θk)

 

 

The SSSC regulator is shown in Figure 19.14. The regulator di erential equations are:

x˙

= KI (pref − ph)

(19.24)

0

= x + KI (pref − ph) − v˜S

 

v˙S = (˜vS − vS )/Tr

Table 19.7 defines all parameters of the SSSC simplified dynamic model.

19.4 Static Synchronous Series Compensator

 

427

 

vh θh

v¯S

v¯h

jxhk

vk θk

 

 

+

 

 

 

 

 

 

¯

 

 

¯

 

h

ih

 

 

ik

k

 

 

 

 

 

 

 

 

Fig. 19.13

Simplified SSSC circuit

 

 

 

 

 

 

 

ph

 

 

 

 

vSmax

 

 

 

 

 

 

 

 

 

 

 

pref

 

 

 

 

 

v˜S

 

 

 

 

vS

 

 

 

 

 

 

1

 

 

 

 

 

 

 

KP + KI /s

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

Tr s + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vSmin

Fig. 19.14 SSSC simplified control diagram

Table 19.7 Simplified SSSC model parameters

Variable

Description

Unit

KI

KP

Tr

vSmax vSmin

Integral gain of PI controller

pu/pu/s

Proportional gain of PI controller

pu/pu

 

 

Regulator time constant

s

Maximum series voltage vS

pu

Minimum series voltage vS

pu

19.4.3Power Flow Model

The SSSC power flow model is simply obtained based on the power flow model of the VSC device (18.29) and (18.30). In particular, (18.30) are:

0 = pse, 0 = ph − pref

(19.25)

The latter condition is satisfied only if the current ise ≤ imaxse .

19.4.4SSSC Initialization

Dynamic SSSC devices can be initialized using a static tie line, similarly to the TCSC devices. The tie line provides the compensated value x˜hk of the

428

19 FACTS Devices

series reactance that leads to the desired active power flow. Then, the SSSC state variable vS can be obtained by solving:

0 =

xhk

− x˜hk

(19.26)

1 + c(vS )

Alternatively, one can use the power flow model described in Subsection 19.4.3.

19.5Unified Power Flow Controller

The Unified Power Flow Controller (UPFC) combines together a shunt and a series VSC with a common capacitor in the dc side. The shunt connection allows regulating the voltage (like a STATCOM) while the series connection allows controlling the power flow (like a SSSC). The UPFC is a very versatile device although it is relatively rare due to its complexity and high cost.

19.5.1Detailed Model

The detailed model consists in a shunt-connected VSC device and a seriesconnected VSC device with a common capacitor in the dc side (see Figure 19.15). The model is composed of four parts, namely the dc network, the shunt VSC, the series VSC and the controllers.

 

vh θh

 

vk θk

 

 

 

 

 

 

pk + jqk

ph + jqh

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

h

 

 

k

 

+

vdc

Fig. 19.15 UPFC scheme

Dc network : The dc side is a parallel RC defined by (17.10) and (17.2). Furthermore, the dc network must contain two nodes, one of which is

19.5 Unified Power Flow Controller

429

connected to the ground. The shunt VSC, the series VSC and the RC element are connected in parallel.

Shunt-connected VSC model : The equations of the VSC are (17.2) and (18.9)- (18.12).

Series-connected VSC model : The equations of the VSC are (17.2), (18.9)- (18.11) and (18.13).

AC Voltage Control

 

 

 

 

 

 

 

 

max

 

 

 

 

 

 

 

 

 

 

am,sh

 

 

 

 

 

 

vacm

 

 

 

 

 

 

 

 

 

 

vh

 

 

Kac

 

 

 

 

KPac s + KIac

 

am,sh

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tacs + 1

 

 

 

+

 

s

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vref

 

 

 

 

 

 

 

 

 

 

 

 

min

 

 

 

 

 

 

 

 

 

 

 

 

am,sh

 

 

DC Voltage Control

 

 

 

 

 

 

 

 

αshmax

 

 

 

 

vdcm

 

 

 

 

 

KPdc s + KIdc

αsh

vdc

 

 

Kdc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tdcs + 1

 

 

+

 

s

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vdcref

αminsh

Fig. 19.16 UPFC shunt control diagrams

Regulators: Figure 19.16 depicts the shunt control for the ac voltage vh and the dc voltage vdc, obtained by means of PI regulators and measurement filters. The equations are:

v˙acm

=

(−vacm + Kacvh)/Tac

 

 

Tac

 

(19.27)

a˙ m,sh

=

Tac

− KIac

vac

+ KIac v

 

 

vh

 

 

 

KPac

 

m

 

ref

 

KPac Kac

 

 

v˙dcm = (−vdcm + Kdcvdc)/Tdc

 

 

Tdc

 

vdc

α˙ sh

=

Tdc

− KIdc

vdc

+ KIdc vdc

 

 

 

 

 

KPdc

 

m

 

ref

 

KPdc Kdc

 

430

19 FACTS Devices

The power flow regulation is a dq control, as shown in Figure 19.17, which allows decoupling the controls of the active and reactive powers [232, 323].

 

 

ik,d

 

 

 

 

 

 

imax

 

 

 

 

 

 

 

 

 

pkref

ik,dref

xˆ1

+

x1

+

 

1

ik,d

 

 

 

 

 

 

 

 

2

 

+

KP + KI /s

 

 

 

 

 

 

 

 

 

 

 

+

K + s

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

imin

 

 

 

 

Ωb

 

 

 

 

 

 

vk,d

 

 

 

 

 

 

 

Ωb

 

 

 

 

 

 

 

 

 

vk,q

qkref

ik,qref

2

 

 

 

 

 

 

Ωb

 

 

Ωb

 

 

 

 

 

 

 

 

 

 

imax

+

xˆ2

+

x2

1

ik,q

 

 

 

 

 

 

 

KP + KI /s

+

 

+

 

 

 

 

K + s

 

 

 

 

 

 

imin

 

 

 

 

 

 

 

ik,q

 

 

 

 

 

Fig. 19.17 UPFC series dq control diagrams

The DAE system is as follows:

xˆ˙ 1

= KI

 

2pref

− ik,d

vk,d

 

 

 

k

 

 

 

i˙k,d

= xˆ1

− Kik,d + KP

 

2pref

vk,d

 

 

 

 

 

 

k

xˆ˙ 2

= KI

 

2qref

− ik,q

vk,q

 

 

 

k

 

 

 

i˙k,q

= xˆ2

− Kik,q + KP

 

2qref

vk,q

 

 

 

 

 

 

k

(19.28)

− ik,d

− ik,q

where the sub-indexes d and q indicate the direct and quadrature components, respectively. For this series branch dq control, the variables am,se, αse and other control parameters are given by the following relations where Ωb is the fundamental frequency base in rad/s and other variables are expressed in per unit:

19.5 Unified Power Flow Controller

 

 

 

 

431

K =

rse

 

 

 

 

(19.29)

Ωbxse

 

 

 

 

 

 

 

 

 

 

 

 

vk,d =

 

2

vk

 

 

 

 

 

vh,d =

2

vh cos(θk − θh)

 

 

vh,q =

2

vh sin(θk − θh)

 

 

x1 = xˆ1 + KP

 

2pref

− ik,d

 

− Ωbik,q

vk,d

 

 

 

 

 

 

 

k

 

 

 

x2 = xˆ2 + KP

 

2qref

− ik,q

 

+ Ωbik,d

vk,q

 

 

 

 

 

 

 

k

 

 

 

xse vse,d = vh,d − vk,d Ωb x1

xse vse,q = vh,q Ωb x2

1

vse = vse2 ,d + vse2 ,q

2

am,se =

 

 

 

 

 

 

 

 

3 vdc

 

 

 

 

8 vse

 

 

 

 

 

 

 

 

vse,d

αse = θk

 

tan1

 

 

 

 

 

 

 

vse,q

All other parameters are defined in Table 19.8.

19.5.2 Simplified Dynamic Model

Simplified UPFC dynamic models are proposed in [161, 192, 213]. The equivalent circuit is obtained merging together the STATCOM and the SSSC sim-

¯

plified models, i.e., a series voltage source v¯S and a shunt current source ish, as depicted in Figure 19.18.

According to the vector diagram of Figure 19.19, the series voltage v¯S and

the shunt current v¯sh sources are defined as:

 

v¯S = vS ej(γ+θh) = (vp + jvq )ej(θh φ)

(19.30)

¯

h

 

ish = (ip + jiq )e

 

 

where:

vp is the component of the voltage v¯S that is in phase with the line current

¯

ih.

vq is the component of the voltage v¯S that is in quadrature with line current

¯

ih.

¯

ip is the component of the current ish in phase with the voltage v¯h. Typically ip = 0.

432

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19 FACTS Devices

 

 

 

 

 

 

 

 

 

 

Table 19.8 UPFC regulator parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Variable

Description

 

 

 

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Kac

Gain of the ac measurement

pu/pu

 

 

 

Kdc

Gain of the dc measurement

pu/pu

 

 

 

 

 

KI

Integral gain for the dq control

pu/pu/s

 

 

KIac

Integral gain for the ac voltage control

pu/pu/s

 

 

KIdc

Integral gain of the vdc control

rad/pu/s

 

 

 

KP

Proportional gain for the dq control

pu/pu

 

 

 

KPdc

Proportional gain of the vdc control

rad/pu

 

 

 

KPac

Proportional gain for the ac voltage control

pu/pu

 

 

 

imax

Maximum current

 

 

 

 

pu

 

 

 

imin

Minimum current

 

 

 

 

pu

 

 

 

 

pkref

Active reference power

pu

 

 

 

 

qkref

Reactive reference power

pu

 

 

 

 

 

rse

Resistance of the series ac circuit

pu

 

 

 

 

 

rsh

Resistance of the shunt ac circuit

pu

 

 

 

 

Tac

Time constant of the ac measurement

s

 

 

 

 

Tdc

Time constant of the dc measurement

s

 

 

 

 

vref

ac voltage reference

pu

 

 

 

 

vref

dc voltage reference

pu

 

 

 

 

 

dc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

xse

Reactance of the series ac circuit

pu

 

 

 

 

xsh

Reactance of the shunt ac circuit

pu

 

 

 

vh θh

 

 

 

 

 

v¯S

v¯h

 

vk θk

 

 

 

 

 

 

 

 

 

 

 

+

jxhk

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

¯

 

 

 

 

 

 

 

¯

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ih

 

 

 

 

 

ik

 

 

k

 

h

 

 

 

¯

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ish

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 19.18 Simplified UPFC circuit

¯

iq is the component of the current ish in quadrature with the voltage v¯h. Typically ish = iq .