Functional Overview

Note

SMCLK[1], SMCLK[2], and SMCLK[3] are unused in this example. These clock signals can be used to clock further groups of memory devices to spread the load on the clocks.

For example, group 1 can be clocked by SMCLK[1], and SMFBCLK[2] and

SMGBCLK[3] can also be generated from this clock.

Figure 2-38 32-bit memory device interconnection example

2.3.3Example of system with single output clock

In systems that are pad limited, a single clock can be used. One of the output clocks, SMCLK[0], is connected to the output of a bi-directional pad. The other 3 clocks can be left unconnected. The pad output enable is tied low so that the pad is always in output mode. The input from the pad is connected to SMFBCLK[3-0] to provide 4 feedback clocks. This is shown in Figure 2-39 on page 2-52.

Functional Overview

Figure 2-39 Connection of SSMC to pad when using a single clock