C Instruction Set

Address, 43

Address mode, 52–59

–Absolute, 59, 114

–Bit, 114

–File Direct, 55, 107–108

–File Indirect, 56–59, 93, 108–114, 153, 194, 227, 420

–Inherent, 54, 106

–Literal, 55, 107

–Register Direct, 54, 107

Analog to digital conversion (ADC), 414– 429, 438

– Clock, 401

AND, see Operation, AND Architecture, 42

Arithmetic Logic Unit (ALU), 25, 41, 88 Array

– Clearing, 57

ASCII code, see Code, ASCII Assembler, 48–49, 197–229, 231

–Absolute, 201–210

–Comment, 48, 203

–Directive, 58, 199

–– #define, 295, 330, 338

–– __config, 261, 363, 445

–– bankisel, 227

–– banksel, 226, 228

–– cblock, 192, 199, 199, 223, 419

–– code, 212, 223

–– da, 453

–– define, 223

–– de, 437, 464

–– dw, 438, 442

–– end, 200, 224

–– equ, 58, 192, 200, 209, 217, 223

–– extern, 213, 224

–– global, 213, 224

–– high, 167, 453

–– if, 330

–– include, 208, 224

–– local, 208, 226, 339

–– low, 167, 453

–– macro, 207, 224

–– org, 166, 182, 200, 201, 223

–– pagesel, 228

–– radix, 442

–– res, 213, 223

–– set, 464

–– udata_ovr, 215, 223

–– udata, 212, 213, 223

–Label, 58, 203, 210

–– $, 449

–– Arithmetic, 223

–Macro, 207, 330, 338

–– Addf, 224

–– Baud_delay, 338

–– Bnc, 225

–– Bnz, 208

–– Countdown, 225

–– Delay_1ms, 207

–– Delay_600, 330

–– Exgwf, 224

–– Movlf, 225

–Number base

–– Binary, 223

–– Decimal, 223

–– Hexadecimal, 222

–Relocating, 210–217

Assembly-level language, 199–229

Bank switching, see Data store, Bank switching

Baud rate, 337

Borrow out, 52, 68, 88, 100, 119 Brownout, see Reset, Brownout

Carry out, 52, 88

CCP module, 371

–Capture modes, 376–379, 385

–Compare modes, 375–376, 385

Clock, 87–88, 258–260, 459

–ADC module, 401

–External, 255

–HS mode, 254

–Start-up, 265

–Timer 1, 371

Code

–ASCII, 3, 5, 223, 337

–Binary Coded Decimal (BCD), 6, 100, 192

–– Bi-quinary, 128

–Decimal, 3

–Hexadecimal, 6

–7-segment, 149, 166

486 INDEX

– Unary, 289, 467

Code Condition register (CCR), 33 Code protection, see Program store,Code

protection Compiler, 232

Configuration word, 260 Counter, 37

D flip flop, see Flip flop, D D latch, see Latch, D Data bus, 20

Data EEPROM memory, 432–438

–Read from, 434

–Write to, 174, 177, 436 Data store, 44–47, 85, 91–94

–Bank switching, 108, 113, 180, 182, 226, 443

–– Reset, 262

Debounce, see Switch, Debounce Destination bit, 88, 107

Device driver, 295

Digital to analog conversion (D/A), 380,

391–419

– PWM, 380–383, 415

EEPROM memory, 97–99, 351–355, 431– 452

E ective address (ea), 56 Erasible PROM (EPROM)

–27C64, 26 Error detection

–Bi-quinary, 130

–Checksum, 73, 207

–Parity, 15, 73, 337

Exclusive-OR, see Operation, eXclusiveOR

Executable code, see Machine code Extension

– Signed, 11

Far goto/call, 115, 141

Fetch and execute, 44, 49–51

File

–Absolute object, 204–207, 219

–– Intel format, 206

–Error, 203, 207

–Header, 209, 243, 296, 413

–Include, 209, 262, 407

–Linker script, 210, 223

–Listing, 204

–Machine-code, see File, Absolute object

–Macro, 208

–Object code, 48, 198

–Source code, 48, 198, 210

File register

–ADCON0, 177, 399

–ADRES, 399, 408

–CCP1CON, 375

–CCPR1H, 375

–CCPR1L, 375

–EEADRH, 439

–EEADR, 98, 98, 432, 434, 441

–EECON1, 98, 98, 439

–EECON2, 98, 99, 432, 439

–EEDATA, 98, 98, 432, 441

–EEDATH, 439

–FSR, 56, 56, 88, 94, 109, 153, 192, 419

–General-Purpose (GPR), 94, 189

–INDF, 56, 93, 110, 153

–INTCON, 94, 97, 175, 408

–OPTION_REG, 96, 97, 281, 363

–PCLATH, 86, 94, 115, 141, 149, 167,

227

–– Reset, 262

–PCL, 85, 94, 167

–PIE1, 343, 372, 409

–PIE2, 377

–PIR1, 342, 372, 409

–PIR2, 377, 439

–PORTA, 95

–PORTB, 93, 168, 174

–PR2, 379

–RCREG, 343

–RCSTA, 342

–SPBRG, 343

–SSPBUF, 317

–SSPCON, 317

–SSPSTAT, 317

–Special Purpose (SPR), 91

–T1CON, 371

–T2CON, 379

–TMR0, 96, 97, 242

–TMR1H, 371

–TMR1L, 371

–TRISA, 95, 182, 274

–TRISB, 93, 95, 274

–TRISC, 274, 319

–TXREG, 342

–TXSTA, 342

File register, Status, see Status register File store, see Data store

Filter

–3-point, 134, 428 Flag, 33

–C, 33, 52, 60, 68, 88, 100, 110, 117, 119, 123, 127, 225, 266

–DC, 33, 89, 101, 266

–Z, 33, 52, 58–60 , 89, 90, 116, 119, 120, 126, 127, 183, 266

Flag, Interrupt, see Interrupt, Flag Flip flop

–D, 31, 186

–T, 36

Fuse, 260–262, 445

–BODEN, 267

–CPD, 445

–CP, 260, 445

–MCLRE, 265

–PWRTE, 264

–WDTE, 363

–WRT, 445

–Programming, 471

–Setting in C, 262

Harvard architecture, 44, 83, 84 Hexadecimal code, see Code, Hexadeci-

mal

High-level language, 231–250

–C, 45, 139, 153, 233–250

–– #bit, 244, 296, 323, 422

–– #byte, 243

–– #define, 243

–– #include, 243

–– #int, 389, 426

–– #use delay(), 414

–– #use fast_io(), 296, 414

–– #use i2c(), 336

–– int, 243

–– long int, 236, 426

–– unsigned int, 236

–– delay_us(), 414

–– disable_interrupts(), 422

–– enable_interrupts(), 422

–– get_timer1(), 389

–– i2c_read(), 335

–– i2c_start(), 335

–– i2c_stop(), 335

–– i2c_write(), 336

–– input(), 296, 414

–– output_pin(), 296, 414

–– read_adc(), 414, 422

–– read_eeprom(), 446

–– set_adc_channel(), 413

–– set_timer1(), 389

–– setup_adc(), 413, 422

–– setup_adc_ports(), 413

–– setup_ccp1(), 389

–– setup_counters(), 364

–– setup_spi(), 323

–– setup_timer_1(), 389

–– sleep(), 422

–– spi_data_is_in(), 324

–– spi_read(), 323

–– spi_write(), 323

–– write_eeprom(), 446

–– Absolute address, 243, 274, 414

–– Automatic data, 216, 427

–– Bit twiddling, 244, 295, 423

–– Fuses, 262, 363

–– Global data, 426

–– Hexadecimal, 212, 223, 243

–– Interrupts in, 426

–– Pointer, 242

–– Static data, 216, 426

Input port, see Parallel I/O, Input

INDEX 487

Instruction

–decf, 59, 117

–incf, 59

–addlw, 47, 100, 107, 118

–addwf, 49, 86, 106

–andlw, 60, 121

–andwf, 60, 121

–bcf, 90, 114, 120, 122, 177, 275

–bsf, 90, 114, 121, 177

–btfsc, 61, 63, 64, 100, 122, 127

–btfss, 58, 61, 110, 111, 127

–call, 114, 140–143, 227

–clrf, 49, 57, 59, 90, 117

–clrwdt, 96, 258, 362–364, 366, 368

–clrw, 59

–comf, 60, 121

–decfsz, 61, 126, 143, 225

–goto, 51, 59, 59, 61, 86, 100, 104, 110,

114, 139, 227

–incfsz, 62, 63, 100, 126

–incf, 49, 58, 117

–iorlw, 60, 122

–iorwf, 122

–movf, 59, 116, 183

–movlw, 60, 116

–movwf, 60, 107, 116, 183

–nop, 125, 144, 257, 330, 339, 441

–retfie, 176, 184, 189, 428

–retlw, 142, 148, 167

–return, 54, 142, 428

–rlf, 60, 70, 71, 123, 289

–rrf, 60, 123

–sleep, 177, 241, 256, 259, 268, 363, 364, 375, 411, 422

–sublw, 55, 59, 68, 102, 118, 120

–subwf, 47, 117, 158

–swapf, 116, 183

–tris, 274

–xorlw, 60, 122

–xorwf, 60, 71, 122

–Execution time, 100, 143–147

–Macro, see Assembler, Macro

–Read-modify-write, 119, 275 Instruction set, 52–63 Integrated circuit

–2401 EEPROM, 352

–2701 EEPROM, 431

–6264 RAM, 39

–MAX233 dual RS-232 transceiver, 348

–MAX485 RS-485 transceiver, 349

–MAX505 quad DAC, 417

–MAX506 quad DAC, 417, 428

–MAX518 quad DAC, 327–336

–MAX549A dual 8-bit SPI DAC, 313

–DS1820 digital thermometer, 356

–27C64 EPROM, 26

–74LS00 quad 2-I/P NAND, 18

–74LS74 dual D flip flop, 31, 38

–74LS138 Natural decoder, 22

488 INDEX

–74LS139 Natural decoder, 22, 39

–74HCT164 octal SIPO shift register,

306, 457

–74LS244 octal 3-state bu er, 21

–74LS283 Adder, 23

–74LS373 Octal D latch, 34

–74LS377 Octal D flip flop, 33

–74LS382 ALU, 23, 25

–74HCT595 latched PISO shift register,

309, 310

–74LS670 Register file, 39

–74LS688 Equality detector, 22 Interrupt, 180

–Analog module, 408

–CCP module, 376

–CCP1, 379

–Context switching, 183, 189–191

–EEPROM, 98

–Flag, 174, 177, 409

–Hardware, 174, 175, 180, 182, 284

–Latency, 175

–Mask, 175, 409

–Multiple-precision data, 185

–Port B change, 174, 284

–Serial port, 343

–SSP module, 317, 321

–Timer 0, 365, 368–371

Interrupt handling, 173

Interrupt Service Routine (ISR), 174, 176– 196, 458

–ADC module, 410

–in C, 389, 426

–In Sleep state, 268

–Timer 0, 368, 370, 371, 384, 426, 449, 459

Interrupt, Vector, see Vector, Interrupt Inverter

– Programmable, 14

Latch

–R S, 30

–D, 30

–R S, 29

LCD display, 360 Linker, 201, 210 Loader, 198, 204

Look-up table, 25, 148–150, 168, 436,

442–443, 452

Loop structure, 56, 237

Machine code, 48, 198, 204–207, 261 Macro, see Assembler, Macro Memory

–EEPROM, see EEPROM memory

–EPROM, 26

–RAM, 39

–ROM, 25

MicroController Unit (MCU), 77

– 6801, 83

–6805, 83, 228

–68HC11, 83, 99

–68HC12, 83

–68HC16, 83

–PIC12C508/9, 253

–– Port GP, 273

–PIC12C5XX, 254, 256, 258–260

–– MCLR, 265

–– OSC, 258

–PIC12C67X, 403, 405, 447

–PIC12CXXX, 84

–PIC16C5XX, 84, 362, 364

–PIC16C64, 268

–PIC16C64A, 268

–PIC16C66, 84

–PIC16C71, 177, 268, 399, 405, 412,

429

–PIC16C711, 268

–PIC16C71X, 403, 409

–PIC16C73, 403, 409

–PIC16C74, 84, 95, 115, 177, 189, 226, 227, 253, 268, 286, 375, 409, 413, 422, 431

–– Current drive, 277

–– Fuses, 262

–– Parallel I/O, 272

–PIC16C74A, 268, 285

–– Fuses, 262

–– Serial port, 344

–– Timer 1, 371

–PIC16C74B, 472

–– Serial port, 344

–– Timer 1, 371

–PIC16C76, 322

–PIC16C77, 322

–PIC16C774, 318

–PIC16C77X, 403

–PIC16C7X, 259, 317

–PIC16C7XX

–– A/D converter, 398

–PIC16C83, 431, 472

–PIC16C84, 91, 431, 472

–PIC16CXXX, 84, 364

–PIC16F74, 318, 431

–PIC16F83, 253, 448

–PIC16F83/4, 259, 431

–– Configuration word, 261

–– Modes, 260–262

–PIC16F84, 84–99, 226, 253, 256, 258

–– Current drive, 277

–PIC16F84A, 268, 331

–PIC16F873, 438

–PIC16F874, 438, 456

–PIC16F876, 227, 439

–PIC16F877, 104, 253, 439

–PIC16F87X, 108, 261, 334, 403, 431,

438–446

–– Fuses, 445

–PIC16LC74, 360

–PIC16LF83/4, 254

–PIC17CXXX, 84, 112, 123, 438

–PIC18CXXX, 84, 112, 208, 225, 227, 365, 373, 438

MicroProcessor Unit (MPU)

–68008, 80

–4004, 6, 78

–6502, 79

–6800, 79

–6802, 79

–6809, 79

–8008, 78

–8080, 78

–8085, 78

–8086, 80

–8088, 80

Modular programming, 138 MPLAB, 220–222, 241, 471 multiprocessing, 322

Non-volatile memory, see EEPROM memory

NOT, see Operation, NOT

Object code, see File, Object Odd binary numbers, 73

1’s complement, see Operation, Complement

Open-collector, 19 Operating System (OS), 233 Operation

–Addition, 59

–AND, 12, 121, 295

–Arithmetic Shift Left, 11

–Arithmetic Shift Right, 11

–Comparison, 59, 110, 119, 291

–Complement, 60, 121

–Decrement, 59

–Decrement W, 55, 73

–Division, 11, 117

–Exclusive-NOR, 14, 22

–eXclusive-OR, 14, 60, 122, 224

–Inclusive-OR, 13, 122

–Increment, 59

–Jump, 61

–Logic Shift Left, 11

–Logic Shift Right, 11, 248

–Multiple-precision addition, 66, 118

–Multiple-precision incrementation, 119

–Multiple-precision shifting, 124

–Multiple-precision test for zero, 125

–Multiplication, 11, 69

–– Shift and add, 150

–NAND, 13, 18, 30

–NOR, 29

–NOT, 12

–Rotate, 60

–Shift

–– Multiple-precision, 70

INDEX 489

–Skip, 46, 61, 86

–Subtraction, 59, 100

–Test File for zero, 116

–Test for Zero, 60, 120

Operation code (op-code), 24, 33, 47

Option register, see File register, OPTION_REG OR, see Operation, OR

Oscillator, see Clock

–Mode, 87, 258–262 Oscillator Start-Up timer, 87

Output port, see Parallel I/O, Output Output structure

–Three-state, 20

Parallel I/O, 94–96, 271–305

–Expansion of, 286

–Port A, 95, 121, 126, 278, 403

–– RA4, 274, 279

–Port B, 93, 95, 120, 273, 274

–– Weak pull-up resistors, 280, 457

–Port C, 271

–– CCP, 376

–– SSP, 317

–Port E, 272, 403

–Port GP, 273, 274

Peripheral Interface Controller (PIC), 83 Peripheral interface, Parallel I/O, see Par-

allel I/O Pin

–OSC1, 255

–ANn, 403

–INT, 257

–OSC1, 258

–OSC2, 258–260

–SS, 318

–CCP1, 376

–CLKIN, 87

–CLKOUT, 87

–INT, 174, 180, 182, 186, 284, 369, 387

–MCLR, 87, 255, 260, 262, 265, 268

–OSC1, 87, 259

–OSC2, 87

–RAn, 95, 126, 182, 186

–RBn, 95, 174, 186

–RCn, 317

–T0CKI, 96, 365, 367, 387

–T1CKI, 371

–TX, 342, 343

Pipeline, 50, 85, 88, 313, 343

–Flushing, 100, 127, 141 Port, Serial, see Serial I/O Port A, see Parallel I/O, Port A Port B, see Parallel I/O, Port B Power consumption, 256 Power-up timer, 87, 261 Program

–Array average, 132

–Array maximum, 113

–Asynchronous serial I/O, 340

490 INDEX

–Background, 174, 180

–BCD addition, 103

–BCD incrementation, 101, 194

–Bi-quinary error detection, 130

–Binary to BCD conversion, 131, 161,

463

–Bit count, 125

–Bit position, 124

–Clearing an array, 56

–Comparator, 292, 414

–Delay, 144, 146, 147, 159, 183, 207

–– Clock independent, 293

–Division, 67, 68, 158

–Double-precision decrementation, 128

–Foreground, 174

–Keypad, 283, 295, 297

–MAX549A SPI DAC, 315

–Multiple-precision addition, 66

–Multiplication, 69, 126, 133, 157

–Peak picking, 425

–Pseudo-random number generator, 71, 250

–Reading the A/D converter module,

407

–Root mean square, 214, 247

–RTC, 193

–7-segment decoder, 149, 166, 249, 463

–Software stack, 166

–SPI output, 308, 463

–Square, 215

–Square root, 162, 163, 216, 245

–Squaring, 444

–Stepper motor, 293

–USART, 345

Program Counter (PC), 46, 51, 59, 61, 62, 85–87, 88, 94, 115, 125, 139, 149, 167, 176, 227, 266

Program store, 44–47, 90–91, 104, 114, 206, 227

–Code protection, 260, 444, 471

–Program/Verify mode, 260 Program/Verify mode, 260 Programmer, 260, 471 Programming model, 52

R S latch, see Latch, R S

Read cycle, 47

Register, 31–39

–Counting, 37 Register bit

–IRP (STATUS[7]), 91, 262

–RP0 (STATUS[5]), 262

–RP1 (STATUS[6]), 91, 226, 262

–ADCSn (ADCON0[7:6]), 400, 411, 413

–ADIE (INTCON[6]), 179, 409, 411

–ADIF (ADCON0[1]), 177, 411, 422

–ADIF (ADCON0 1), 399

–ADON (ADCON0[0]), 401

–BF (SSPSTAT[0]), 317, 320

–CCP1IE (PIE1[2]), 375

–CCP1IF (PIR1[2]), 382

–CCP1IF (PIR1[2]), 375

–CCP1Mn (CCP1CON[3:0]), 375

–CCP2IE (PIE2[0]), 377

–CCP2IF (PIR2[2]), 377

–CHSn (ADCON0[5:3]), 403, 406, 413

–CKP (SSPCON[4]), 318

–CREN (RCSTA[4]), 343

–DC1Bn (CCP1CON[5:4]), 381

–EEIE (INTCON[6]), 179, 435

–EEIF (EECON1[4]), 98, 177, 435

–EEIF (PIR2[4]), 439

–EEPGD (EECON1[7]), 439

–FERR (RCSTA[2]), 343

–GIE (INTCON[7]), 175, 176, 177, 189, 321, 343, 368, 372, 375

–GO/DONE (ADCON0[2]), 376, 399, 407, 411, 414, 422

–INTEDGE (OPTION_REG[0]), 180

–INTE (INTCON[4]), 182, 257, 369

–INTF (INTCON[1]), 180, 184, 186, 243, 257, 284

–IRP (STATUS[7]), 113, 227

–OERR (RCSTA[1]), 343, 344

–PCFGn (ADCON1[2:0]), 403, 412, 413

–PD (STATUS[3]), 90, 257, 265, 363

–TO (STATUS[3]), 262, 266

–PEIE (INTCON[6]), 179, 321, 343, 372, 375, 409, 412, 422

–PSA (OPTION_REG[3]), 96, 363, 365

–PSn (OPTION_REG[1:0]), 97

–PSn (OPTION_REG[2:0]), 96, 362, 364

–RBIE (INTCON[3]), 285

–RBIF (INTCON[0]), 285

–RBPU (OPTION_REG[7]), 281, 296

–RCIE (PIE1[5]), 343

–RCIF (PIR1[5]), 343, 344

–RD (EECON1[0]), 98, 434, 441

–RP0 (STATUS[5]), 88, 108, 180, 182, 190, 226

–RP1 (STATUS[6]), 108, 113

–RX9 (RCSTA[6]), 343

–RX9D (RCSTA[0]), 343

–SPEN (RCSTA[7]), 342

–SSPCON (SSPCON[5]), 319

–SSPIE (PIE1[3]), 321

–SSPIF (PIR1[3]), 317, 321

–SSPM (SSPCON[3:0]), 317

–SYNC (TXSTA[4]), 341

–T0CS (OPTION_REG[5]), 97, 365

–T0IE (INTCON[5]), 176, 179, 365, 368

–T0IF (INTCON[2]), 97, 176, 365, 368, 462

–T0SE (OPTION_REG[4]), 97, 365

–T1CKPSn (T1CON[5:4]), 372

–T1OSCEN (T1CON[3]), 371

–T1SYNC (T1CON[2]), 372

–TMR1CS (T1CON[1]), 372

–TMR1IE (PIE1[0]), 372, 375

–TMR1IF (PIR1[0]), 372

–TMR1ON (T1CON[0]), 373

–TMR2IF (PIR1[1]), 379, 382

–TOUTPSn (T2CON[5:2]), 379

–TO (STATUS[4]), 90, 97, 257, 262, 265, 266, 363–364, 367, 449

–TX9 (TXSTA[6]), 342

–TXEN (TXSTA[5]), 342

–TXIE (PIE1[4]), 342

–TXIF (PIR1[4]), 342, 344

–WCOL (SSPCON[7]), 319, 320

–WR (EECON1[1]), 98

–WREN (EECON1[2]), 98

–WRERR (EECON1[3]), 98, 435

–GIE (INTCON[7]), 257, 411, 421, 422, 435

Register Transfer Language (rtl), 49, 55, 63, 107

Register, etc., see File register, etc Reset

–GIE (INTCON[7]), 175

–RBPU (OPTION_REG[7]), 281

–TRIS register, 277

–ADC module, 401, 404

–Brown-out, 267, 269

–C, 89

–CCP, 375

–INT edge, 180

–Interrupt mask bit, 177

–Manual, 263, 265, 457

–Parallel port, 182, 274

–PCLATH, 86, 115

–Power-on, 262–266, 363, 449

–RP0 (STATUS[5]), 88, 91

–SSPEN (SSPCON[5]), 319

–Timer 0, 365

–Timer 1, 373

–Timer 2, 379

–Watchdog, 366

–Watchdog timer, 96, 363, 367, 449 Reset, Vector, see Vector, Reset Resource budget, 82

RS-232 etc, see Signalling standard

Serial I/O, 305–361

–1-Wire, 355–359, 359

–Asynchronous, 336–349, 389

–I2C, 324–336

–SPI, 313–324, 464

Serial Peripheral Interface (SPI), see Serial I/O, SPI

7-segment display, 148, 298, 306, 457 Shift register, 34

Sign bit, see 2’s complement, Signed numbers

Signalling standard

–RS-232, 346–349

–RS-485, 349

INDEX 491

–RS422, 348

–RS423, 346

–RS485, 348 Simulator, 220–222 Sleep mode

–ADC module, 401, 411

–SSP module, 322

Sleep state, 177, 255, 256–258, 266, 363,

364

–C code for, 422

–TRIS registers, 274

–Interrupt, 266, 268

–Port B change, 286

–Timer 1, 372 Smart card, 305

Source code, see File, Source

Special Purpose Register, nnn, see File register, nnn

Special test/configuration memory, 260, 436, 444

Stack, 86, 140, 462

–Hardware, 140, 176

–Software, 153–157

Status Register (STATUS), 33, 52, 88–90, 94, 109, 183

Stepper motor, 294 Subroutine, 139–169

–Nested, 140, 176, 461

–Recursive, 143 Switch

–Debounce, 30, 168, 462

–Interface, 280

Synchronous Serial Port (SSP), 317–324

10’s complement, 9, 104 Text editor, 201

3-state bu er, 20, 273

Timer (TMR0), 96–97, 174, 364–371, 383, 385, 447–452, 458, 459

– External clock, 279

Timer (TMR1), 371–379, 385, 389

Timer (TMR2), 318, 371, 379–383 2’s complement

–Dividing by shifting, 11

–Number, 9–12, 73, 100

–Overflow, 10, 11, 15, 24

–Signed Number, 9–12

Universal Asynchronous Receiver Trans-

mitter (UART), 341

Universal Synchronous-Asynchronous Re-

ceiver Transmitter (USART), 341

Vector, 210

–Interrupt, 91, 179, 182, 183, 368, 464

–Reset, 91, 182, 217, 262, 265, 266, 363, 367, 464

Von Neumann architecture, 41–44