- •Chapter 1
- •1.1 Motivation
- •1.2 Objective of the Specification
- •1.3 Scope of the Document
- •1.4 Document Organization
- •Chapter 2
- •Chapter 3
- •3.1 Goals for the Universal Serial Bus
- •3.2 Taxonomy of Application Space
- •3.3 Feature List
- •Chapter 4
- •4.1 USB System Description
- •4.1.1 Bus Topology
- •4.2 Physical Interface
- •4.2.1 Electrical
- •4.2.2 Mechanical
- •4.3 Power
- •4.3.1 Power Distribution
- •4.3.2 Power Management
- •4.4 Bus Protocol
- •4.5 Robustness
- •4.5.1 Error Detection
- •4.5.2 Error Handling
- •4.6 System Configuration
- •4.6.1 Attachment of USB Devices
- •4.6.2 Removal of USB Devices
- •4.6.3 Bus Enumeration
- •4.7 Data Flow Types
- •4.7.1 Control Transfers
- •4.7.2 Bulk Transfers
- •4.7.3 Interrupt Transfers
- •4.7.4 Isochronous Transfers
- •4.7.5 Allocating USB Bandwidth
- •4.8 USB Devices
- •4.8.1 Device Characterizations
- •4.8.2 Device Descriptions
- •4.9 USB Host: Hardware and Software
- •4.10 Architectural Extensions
- •Chapter 5
- •5.1 Implementer Viewpoints
- •5.2 Bus Topology
- •5.2.1 USB Host
- •5.2.2 USB Devices
- •5.2.3 Physical Bus Topology
- •5.2.4 Logical Bus Topology
- •5.2.5 Client Software-to-function Relationship
- •5.3 USB Communication Flow
- •5.3.1 Device Endpoints
- •5.3.2 Pipes
- •5.4 Transfer Types
- •5.5 Control Transfers
- •5.5.1 Control Transfer Data Format
- •5.5.2 Control Transfer Direction
- •5.5.3 Control Transfer Packet Size Constraints
- •5.5.4 Control Transfer Bus Access Constraints
- •5.5.5 Control Transfer Data Sequences
- •5.6 Isochronous Transfers
- •5.6.1 Isochronous Transfer Data Format
- •5.6.2 Isochronous Transfer Direction
- •5.6.3 Isochronous Transfer Packet Size Constraints
- •5.6.4 Isochronous Transfer Bus Access Constraints
- •5.6.5 Isochronous Transfer Data Sequences
- •5.7 Interrupt Transfers
- •5.7.1 Interrupt Transfer Data Format
- •5.7.2 Interrupt Transfer Direction
- •5.7.3 Interrupt Transfer Packet Size Constraints
- •5.7.4 Interrupt Transfer Bus Access Constraints
- •5.7.5 Interrupt Transfer Data Sequences
- •5.8 Bulk Transfers
- •5.8.1 Bulk Transfer Data Format
- •5.8.2 Bulk Transfer Direction
- •5.8.3 Bulk Transfer Packet Size Constraints
- •5.8.4 Bulk Transfer Bus Access Constraints
- •5.8.5 Bulk Transfer Data Sequences
- •5.9 Bus Access for Transfers
- •5.9.1 Transfer Management
- •5.9.2 Transaction Tracking
- •5.9.3 Calculating Bus Transaction Times
- •5.9.4 Calculating Buffer Sizes in Functions and Software
- •5.9.5 Bus Bandwidth Reclamation
- •5.10 Special Considerations for Isochronous Transfers
- •5.10.1 Example Non-USB Isochronous Application
- •5.10.2 USB Clock Model
- •5.10.3 Clock Synchronization
- •5.10.4 Isochronous Devices
- •5.10.5 Data Prebuffering
- •5.10.6 SOF Tracking
- •5.10.7 Error Handling
- •5.10.8 Buffering for Rate Matching
- •Chapter 6
- •6.1 Architectural Overview
- •6.3 Cable
- •6.4 Cable Assembly
- •6.4.1 Detachable Cable Assemblies
- •6.4.3 Low-speed Captive Cable Assemblies
- •6.4.4 Prohibited Cable Assemblies
- •6.5.1 USB Icon Location
- •6.5.2 USB Connector Termination Data
- •6.5.3 Series “A” and Series “B” Receptacles
- •6.5.4 Series “A” and Series “B” Plugs
- •6.6.1 Description
- •6.6.2 Construction
- •6.6.3 Electrical Characteristics
- •6.6.4 Cable Environmental Characteristics
- •6.6.5 Listing
- •6.7 Electrical, Mechanical and Environmental Compliance Standards
- •6.7.1 Applicable Documents
- •6.8 USB Grounding
- •Chapter 7
- •7.1 Signaling
- •7.1.1 USB Driver Characteristics
- •7.1.2 Data Signal Rise and Fall
- •7.1.3 Cable Skew
- •7.1.4 Receiver Characteristics
- •7.1.5 Device Speed Identification
- •7.1.6 Input Characteristics
- •7.1.7 Signaling Levels
- •7.1.8 Data Encoding/Decoding
- •7.1.9 Bit Stuffing
- •7.1.10 Sync Pattern
- •7.1.11 Data Signaling Rate
- •7.1.12 Frame Interval and Frame Interval Adjustment
- •7.1.13 Data Source Signaling
- •7.1.14 Hub Signaling Timings
- •7.1.15 Receiver Data Jitter
- •7.1.16 Cable Delay
- •7.1.17 Cable Attenuation
- •7.1.18 Bus Turn-around Time and Inter-packet Delay
- •7.1.19 Maximum End-to-end Signal Delay
- •7.2 Power Distribution
- •7.2.1 Classes of Devices
- •7.2.2 Voltage Drop Budget
- •7.2.3 Power Control During Suspend/Resume
- •7.2.4 Dynamic Attach and Detach
- •7.3 Physical Layer
- •7.3.1 Regulatory Requirements
- •7.3.2 Bus Timing/Electrical Characteristics
- •7.3.3 Timing Waveforms
- •Chapter 8
- •8.1 Bit Ordering
- •8.2 SYNC Field
- •8.3 Packet Field Formats
- •8.3.1 Packet Identifier Field
- •8.3.2 Address Fields
- •8.3.3 Frame Number Field
- •8.3.4 Data Field
- •8.3.5 Cyclic Redundancy Checks
- •8.4 Packet Formats
- •8.4.1 Token Packets
- •8.4.2 Start-of-Frame Packets
- •8.4.3 Data Packets
- •8.4.4 Handshake Packets
- •8.4.5 Handshake Responses
- •8.5 Transaction Formats
- •8.5.1 Bulk Transactions
- •8.5.2 Control Transfers
- •8.5.3 Interrupt Transactions
- •8.5.4 Isochronous Transactions
- •8.6 Data Toggle Synchronization and Retry
- •8.6.1 Initialization via SETUP Token
- •8.6.2 Successful Data Transactions
- •8.6.3 Data Corrupted or Not Accepted
- •8.6.4 Corrupted ACK Handshake
- •8.6.5 Low-speed Transactions
- •8.7 Error Detection and Recovery
- •8.7.1 Packet Error Categories
- •8.7.2 Bus Turn-around Timing
- •8.7.3 False EOPs
- •8.7.4 Babble and Loss of Activity Recovery
- •Chapter 9
- •9.1 USB Device States
- •9.1.1 Visible Device States
- •9.1.2 Bus Enumeration
- •9.2 Generic USB Device Operations
- •9.2.1 Dynamic Attachment and Removal
- •9.2.2 Address Assignment
- •9.2.3 Configuration
- •9.2.4 Data Transfer
- •9.2.5 Power Management
- •9.2.6 Request Processing
- •9.2.7 Request Error
- •9.3 USB Device Requests
- •9.3.1 bmRequestType
- •9.3.2 bRequest
- •9.3.3 wValue
- •9.3.4 wIndex
- •9.3.5 wLength
- •9.4 Standard Device Requests
- •9.4.1 Clear Feature
- •9.4.2 Get Configuration
- •9.4.3 Get Descriptor
- •9.4.4 Get Interface
- •9.4.5 Get Status
- •9.4.6 Set Address
- •9.4.7 Set Configuration
- •9.4.8 Set Descriptor
- •9.4.9 Set Feature
- •9.4.10 Set Interface
- •9.4.11 Synch Frame
- •9.5 Descriptors
- •9.6 Standard USB Descriptor Definitions
- •9.6.1 Device
- •9.6.2 Configuration
- •9.6.3 Interface
- •9.6.4 Endpoint
- •9.6.5 String
- •9.7 Device Class Definitions
- •9.7.1 Descriptors
- •9.7.2 Interface(s) and Endpoint Usage
- •9.7.3 Requests
- •Chapter 10
- •10.1 Overview of the USB Host
- •10.1.1 Overview
- •10.1.2 Control Mechanisms
- •10.1.3 Data Flow
- •10.1.4 Collecting Status and Activity Statistics
- •10.1.5 Electrical Interface Considerations
- •10.2 Host Controller Requirements
- •10.2.1 State Handling
- •10.2.2 Serializer/Deserializer
- •10.2.3 Frame Generation
- •10.2.4 Data Processing
- •10.2.5 Protocol Engine
- •10.2.6 Transmission Error Handling
- •10.2.7 Remote Wakeup
- •10.2.8 Root Hub
- •10.2.9 Host System Interface
- •10.3 Overview of Software Mechanisms
- •10.3.1 Device Configuration
- •10.3.2 Resource Management
- •10.3.3 Data Transfers
- •10.3.4 Common Data Definitions
- •10.4 Host Controller Driver
- •10.5 Universal Serial Bus Driver
- •10.5.1 USBD Overview
- •10.5.2 USBD Command Mechanism Requirements
- •10.5.3 USBD Pipe Mechanisms
- •10.5.4 Managing the USB via the USBD Mechanisms
- •10.5.5 Passing USB Preboot Control to the Operating System
- •10.6 Operating System Environment Guides
- •Chapter 11
- •11.1 Overview
- •11.1.1 Hub Architecture
- •11.1.2 Hub Connectivity
- •11.2 Hub Frame Timer
- •11.2.1 Frame Timer Synchronization
- •11.2.2 EOF1 and EOF2 Timing Points
- •11.3 Host Behavior at End-of-Frame
- •11.3.1 Latest Host Packet
- •11.3.2 Packet Nullification
- •11.3.3 Transaction Completion Prediction
- •11.4 Internal Port
- •11.4.1 Inactive
- •11.4.2 Suspend Delay
- •11.4.3 Full Suspend (Fsus)
- •11.4.4 Generate Resume (GResume)
- •11.5 Downstream Ports
- •11.5.1 Downstream Port State Descriptions
- •11.6 Upstream Port
- •11.6.1 Receiver
- •11.6.2 Transmitter
- •11.7 Hub Repeater
- •11.7.1 Wait for Start of Packet from Upstream Port (WFSOPFU)
- •11.7.2 Wait for End of Packet from Upstream Port (WFEOPFU)
- •11.7.3 Wait for Start of Packet (WFSOP)
- •11.7.4 Wait for End of Packet (WFEOP)
- •11.8 Bus State Evaluation
- •11.8.1 Port Error
- •11.8.2 Speed Detection
- •11.8.3 Collision
- •11.9 Suspend and Resume
- •11.10 Hub Reset Behavior
- •11.10.1 Hub Receiving Reset on Upstream Port
- •11.11 Hub Port Power Control
- •11.11.1 Multiple Gangs
- •11.12 Hub I/O Buffer Requirements
- •11.12.1 Pull-up and Pull-down Resistors
- •11.12.2 Edge Rate Control
- •11.13 Hub Controller
- •11.13.1 Endpoint Organization
- •11.13.2 Hub Information Architecture and Operation
- •11.13.3 Port Change Information Processing
- •11.13.4 Hub and Port Status Change Bitmap
- •11.13.5 Over-current Reporting and Recovery
- •11.14 Hub Configuration
- •11.15 Descriptors
- •11.15.1 Standard Descriptors
- •11.15.2 Class-specific Descriptors
- •11.16 Requests
- •11.16.1 Standard Requests
- •11.16.2 Class-specific Requests
- •Index
Universal Serial Bus Specification Revision 1.1
8.3.5 Cyclic Redundancy Checks
Cyclic redundancy checks (CRCs) are used to protect all non-PID fields in token and data packets. In this context, these fields are considered to be protected fields. The PID is not included in the CRC check of a packet containing a CRC. All CRCs are generated over their respective fields in the transmitter before bit stuffing is performed. Similarly, CRCs are decoded in the receiver after stuffed bits have been removed.
Token and data packet CRCs provide 100% coverage for all singleand double-bit errors. A failed CRC is considered to indicate that one or more of the protected fields is corrupted and causes the receiver to ignore those fields, and, in most cases, the entire packet.
For CRC generation and checking, the shift registers in the generator and checker are seeded with an allones pattern. For each data bit sent or received, the high order bit of the current remainder is XORed with the data bit and then the remainder is shifted left one bit and the low-order bit set to zero. If the result of that XOR is one, then the remainder is XORed with the generator polynomial.
When the last bit of the checked field is sent, the CRC in the generator is inverted and sent to the checker MSb first. When the last bit of the CRC is received by the checker and no errors have occurred, the remainder will be equal to the polynomial residual.
A CRC error exists if the computed checksum remainder at the end of a packet reception does not match the residual.
Bit stuffing requirements must be met for the CRC, and this includes the need to insert a zero at the end of a CRC if the preceding six bits were all ones.
8.3.5.1 Token CRCs
A five-bit CRC field is provided for tokens and covers the ADDR and ENDP fields of IN, SETUP, and OUT tokens or the time stamp field of an SOF token. The generator polynomial is:
G(X) = X5 + X2 + 1
The binary bit pattern that represents this polynomial is 00101B. If all token bits are received without error, the five-bit residual at the receiver will be 01100B.
8.3.5.2 Data CRCs
The data CRC is a 16-bit polynomial applied over the data field of a data packet. The generating polynomial is:
G(X) = X16 + X15 + X2 + 1
The binary bit pattern that represents this polynomial is 1000000000000101B. If all data and CRC bits are received without error, the 16-bit residual will be 1000000000001101B.
8.4 Packet Formats
This section shows packet formats for token, data, and handshake packets. Fields within a packet are displayed in these figures in the order in which bits are shifted out onto the bus.
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Universal Serial Bus Specification Revision 1.1
8.4.1 Token Packets
Figure 8-5 shows the field formats for a token packet. A token consists of a PID, specifying either IN, OUT, or SETUP packet type; and ADDR and ENDP fields. For OUT and SETUP transactions, the address and endpoint fields uniquely identify the endpoint that will receive the subsequent Data packet. For IN transactions, these fields uniquely identify which endpoint should transmit a Data packet. Only the host can issue token packets. IN PIDs define a Data transaction from a function to the host. OUT and SETUP PIDs define Data transactions from the host to a function.
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Figure 8-5. Token Format
Token packets have a five-bit CRC that covers the address and endpoint fields as shown above. The CRC does not cover the PID, which has its own check field. Token and SOF packets are delimited by an EOP after three bytes of packet field data. If a packet decodes as an otherwise valid token or SOF but does not terminate with an EOP after three bytes, it must be considered invalid and ignored by the receiver.
8.4.2 Start-of-Frame Packets
Start-of-Frame (SOF) packets are issued by the host at a nominal rate of once every 1.00ms 0.0005ms. SOF packets consist of a PID indicating packet type followed by an 11-bit frame number field as illustrated in Figure 8-6.
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Frame Number |
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Figure 8-6. SOF Packet
The SOF token comprises the token-only transaction that distributes an SOF marker and accompanying frame number at precisely timed intervals corresponding to the start of each frame. All full-speed functions, including hubs, receive the SOF packet. The SOF token does not cause any receiving function to generate a return packet; therefore, SOF delivery to any given function cannot be guaranteed. The SOF packet delivers two pieces of timing information. A function is informed that an SOF has occurred when it detects the SOF PID. Frame timing sensitive functions, which do not need to keep track of frame number (e.g., a hub), need only decode the SOF PID; they can ignore the frame number and its CRC. If a function needs to track frame number, it must comprehend both the PID and the time stamp. Full-speed devices that have no particular need for bus timing information may ignore the SOF packet.
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Universal Serial Bus Specification Revision 1.1
8.4.3 Data Packets
A data packet consists of a PID, a data field containing zero or more bytes of data, and a CRC as shown in Figure 8-7. There are two types of data packets, identified by differing PIDs: DATA0 and DATA1. Two data packet PIDs are defined to support data toggle synchronization (refer to Section 8.6).
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Figure 8-7. Data Packet Format
Data must always be sent in integral numbers of bytes. The data CRC is computed over only the data field in the packet and does not include the PID, which has its own check field.
8.4.4 Handshake Packets
Handshake packets, as shown in Figure 8-8, consist of only a PID. Handshake packets are used to report the status of a data transaction and can return values indicating successful reception of data, command acceptance or rejection, flow control, and halt conditions. Only transaction types that support flow control can return handshakes. Handshakes are always returned in the handshake phase of a transaction and may be returned, instead of data, in the data phase. Handshake packets are delimited by an EOP after one byte of packet field. If a packet decodes as an otherwise valid handshake but does not terminate with an EOP after one byte, it must be considered invalid and ignored by the receiver.
8 bits
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Figure 8-8. Handshake Packet
There are three types of handshake packets:
ACK indicates that the data packet was received without bit stuff or CRC errors over the data field and that the data PID was received correctly. ACK may be issued either when sequence bits match and the receiver can accept data or when sequence bits mismatch and the sender and receiver must resynchronize to each other (refer to Section 8.6 for details). An ACK handshake is applicable only in transactions in which data has been transmitted and where a handshake is expected. ACK can be returned by the host for IN transactions and by a function for OUT or SETUP transactions.
NAK indicates that a function was unable to accept data from the host (OUT) or that a function has no data to transmit to the host (IN). NAK can only be returned by functions in the data phase of IN transactions or the handshake phase of OUT transactions. The host can never issue NAK. NAK is used for flow control purposes to indicate that a function is temporarily unable to transmit or receive data, but will eventually be able to do so without need of host intervention.
STALL is returned by a function in response to an IN token or after the data phase of an OUT transaction (see Figure 8-9 and Figure 8-13). STALL indicates that a function is unable to transmit or receive data, or that a control pipe request is not supported. The host is not permitted to return a STALL under any condition.
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Universal Serial Bus Specification Revision 1.1
The STALL handshake is used by a device in one of two distinct occasions. The first case, known as “functional stall,” is when the Halt feature associated the endpoint is set. (The Halt feature is specified in Chapter 9 of this document.) A special case of the functional stall is the “commanded stall.” Commanded stall occurs when the host explicitly sets the endpoint’s Halt feature, as detailed in Chapter 9. Once a function’s endpoint is halted, the function must continue returning STALL until the condition causing the halt has been cleared through host intervention.
The second case, known as “protocol stall,” is detailed in Section 8.5.2. Protocol stall is unique to control pipes. Protocol stall differs from functional stall in meaning and duration. A protocol STALL is returned during the Data or Status stage of a control transfer, and the STALL condition terminates at the beginning of the next control transfer (Setup). The remainder of this section refers to the general case of a functional stall.
8.4.5 Handshake Responses
Transmitting and receiving functions must return handshakes based upon an order of precedence detailed in Table 8-2 through Table 8-4. Not all handshakes are allowed, depending on the transaction type and whether the handshake is being issued by a function or the host. Note that if an error occurs during the transmission of the token to the function, the function will not respond with any packets until the next token is received and successfully decoded.
8.4.5.1 Function Response to IN Transactions
Table 8-2 shows the possible responses a function may make in response to an IN token. If the function is unable to send data, due to a halt or a flow control condition, it issues a STALL or NAK handshake, respectively. If the function is able to issue data, it does so. If the received token is corrupted, the function returns no response.
Table 8-2. Function Responses to IN Transactions
Token Received |
Function Tx |
Function Can |
Action Taken |
Corrupted |
Endpoint Halt |
Transmit Data |
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Feature |
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Yes |
Don’t care |
Don’t care |
Return no response |
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No |
Set |
Don’t care |
Issue STALL handshake |
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No |
Not set |
No |
Issue NAK handshake |
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No |
Not set |
Yes |
Issue data packet |
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8.4.5.2 Host Response to IN Transactions
Table 8-3 shows the host response to an IN transaction. The host is able to return only one type of handshake: ACK. If the host receives a corrupted data packet, it discards the data and issues no response. If the host cannot accept data from a function, (due to problems such as internal buffer overrun) this condition is considered to be an error and the host returns no response. If the host is able to accept data and the data packet is received error-free, the host accepts the data and issues an ACK handshake.
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