Back Annotation and Delay Calculation
5
Example Listings
This chapter contains the complete C-language source code listings of all of the example delay back annotators and delay calculators referenced in this document. Each example is preceded by a brief description of its operation.
Note that the veriusertfs definition needed to associate a new Verilog-XL HDL system task with the delay back annotator or delay calculator appears at the end of each example.
Because the definition is included in this manner, the files containing the example source code completely replace the file veriuser.c in the Veritool linking step.
Delay Back Annotators
Cell Output Nets to Lumped or Distributed Delay Cells
Figure 5-1 on page 93 shows a delay back annotator that requires a delay file containing cell output net names and their associated rise and fall delays. Figure 3-5 on page 25 shows an example delay file in this syntax. The back annotator reads each net/delay pair and adds the delays to all primitives in the appropriate cell instance that drive the net. This back annotator must be used with designs containing cells described with lumped or distributed (primitive output) delay timing, as does the design in Figure 3-1 on page 22 and Figure 3-3 on page 24 .
Figure 5-1 Annotating from cell output nets to lumped or distributed delay cells
#include <stdio.h> #include "acc_user.h" #include "veriuser.h"
#define dlArgsPerLine 3
dl_read_net_delays()
{
FILE *fdin;
char *file_name, net_name[256]; int num_args, line_num = 0; double rise, fall;
handle net, prim, driver; bool dl_verbose = false;
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/**********************************/ /*** Initialize access routines ***/
/**********************************/ acc_initialize(); acc_configure(accDevelopmentVersion,"1.5a");
/*******************************************************/
/*** Configure so that if acc_replace_delays needs |
***/ |
/** a hiz delay it makes it the maximum of the input |
**/ |
/*** rise and fall delays |
***/ |
/*******************************************************/
acc_configure(accToHiZDelay,"max"); /********************************************/ /*** Check for +dlverbose on command line ***/
/********************************************/
if (mc_scan_plusargs("dlverbose")) dl_verbose = true;
/**********************************/ /*** Open delay annotation file ***/
/**********************************/
file_name = tf_strgetp(1,’b’);
if ((fdin = fopen(file_name,"r")) == null)
{
io_printf("file: <%s> not found\n", file_name); return;
}
/**********************************************/ /*** Read and process each line in the file ***/
/**********************************************/ while ((num_args=fscanf(fdin,"%s %lf %lf",
net_name,&rise,&fall))!= EOF)
{
/*****************************************************/ /*** Check for correct number of arguments read in ***/
/*****************************************************/ line_num++;
if (num_args != dlArgsPerLine)
{
io_printf("Input error in file %s at line %d\n", file_name, line_num); continue;
}
/****************************************************/ /*** Find handle to input net, make sure it is OK ***/
/****************************************************/ net = acc_handle_object(net_name) ;
if ((net == null) || (acc_fetch_type(net) != accNet))
{
io_printf("Warning from dl_ann : net %s not found\n", net_name);
continue;
}
/*******************************************************/ /*** Replace delays on all net drivers in same ***/
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/*** module as the net |
***/ |
/*******************************************************/ driver = null;
while (driver = acc_next_driver(net,driver))
{
/*** check if driver and net are in same module ***/
prim = acc_handle_parent(driver);
if (acc_handle_parent(prim) != acc_handle_parent(net)) continue;
if (dl_verbose)
{
double newrise, newfall; acc_fetch_delays(prim,&newrise,&newfall); io_printf("Primitive %s had added rise fall delays :
%d %d\n", acc_fetch_fullname(prim), (int)rise, (int)fall);
}
acc_append_delays(driver, rise, fall); if (dl_verbose)
{
double newrise, newfall; acc_fetch_delays(prim,&newrise,&newfall); io_printf("New delays are : %d %d\n",
(int)newrise, (int)newfall);
}
}
}
/* clean up access routines */ acc_close();
}
s_tfcell veriusertfs[] = { {usertask,0,
0,0, dl_read_net_delays,0, "$ba_delays",0},
{0}
};
Interconnect Nets to Lumped or Distributed Delay Cells
Figure 5-2 on page 95 shows an example delay back annotator that requires a delay file that contains interconnect net names and their associated rise and fall delays. Figure 3-6 on page 26 shows an example delay file that follows this syntax. The back annotator reads each net/ delay pair and adds the delays to all primitives that drive the net in all cell instances that have output or inout ports connected to the net. This back annotator must be used with designs that contain cells described with lumped or distributed (primitive output) delay timing, as does the design in Figure 3-1 on page 22 and Figure 3-3 on page 24 .
Figure 5-2 Annotating from interconnect nets to lumped or distributed delay cells
#include <stdio.h> #include "acc_user.h"
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#include "veriuser.h"
#define dlArgsPerLine 3
dl_read_int_delays()
{
FILE *fdin;
char *file_name, net_name[256]; int num_args, line_num = 0; double rise, fall;
handle net, prim, driver; bool dl_verbose = false;
/**********************************/ /*** Initialize access routines ***/
/**********************************/ acc_initialize(); acc_configure(accDevelopmentVersion,"1.5a");
/************************************************************/
/*** Configure so that |
if |
acc_replace_delays needs a hiz |
***/ |
||
/*** |
delay it |
makes it |
the maximum of the input |
***/ |
|
/*** |
rise and |
fall delays |
|
***/ |
|
/************************************************************/ acc_configure(accToHiZDelay,"max");
/********************************************/ /*** Check for +dlverbose on command line ***/
/********************************************/ if (mc_scan_plusargs("dlverbose"))
dl_verbose = true;
/**********************************/ /*** Open delay annotation file ***/
/**********************************/ file_name = tf_strgetp(1,’b’);
if ((fdin = fopen(file_name,"r")) == null)
{
io_printf("file: <%s> not found\n", file_name); return;
}
/**********************************************/ /*** Read and process each line in the file ***/
/**********************************************/ while ((num_args=fscanf(fdin,"%s %lf %lf",
net_name,&rise,&fall)) != EOF)
{
/*****************************************************/ /*** Check for correct number of arguments read in ***/
/*****************************************************/ line_num++;
if (num_args != dlArgsPerLine)
{
io_printf("Input error in file %s at line %d\n", file_name, line_num);
continue;
}
/****************************************************/ /*** Find handle to input net, make sure it is OK ***/
/****************************************************/ net = acc_handle_object(net_name) ;
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