Bank Switching Configuration

This is done with definitions in an assembler source file. For the classic 8051 devices the bank switch configuration is defined in the file L51_BANK.A51 found in the \C51\LIB\ subdirectory. For the Philips 80C51MX the file MX51BANK.A51 is used.

NOTE

For extended 8051 devices there are several Keil Application Notes available on www.keil.com or the Keil development tools CD-ROM that explain the banking and memory configuration for these devices.

The following table explains the definitions in the Bank Configuration File:

If, for example, two address lines are used, P1.3 and P1.4 are allocated in this case. The remaining lines of the 8051 I/O port can be used for other purposes.

For ?B_MODE = 4 (bank switching via user provided code) define the following:

The Ax51 assembler is required to assemble L51_BANK.A51 or MX51BANK.A51. The source file should be copied as part of your project file. Public Symbols in L51_BANK.A51

Additional PUBLIC Symbols are provided in L51_BANK.A51 for your convenience. They are described below.

Name Description

?B_CURRENTBANK is a memory location in the DATA or SFR memory, which contains the currently selected memory bank. This memory location can be read for debugging. A modification of the memory location, however, does not cause a bank switching in most cases. Only required bits based on setting of ?B_NBANKS and ?B_FIRSTBIT are valid in this memory location.

The bits, which are not required, must be masked out with a corresponding mask.

_SWITCHBANK is a Cx51 compatible function, which allows the bank address to be selected by the user program. This function can be used for bank switching if the constant memory is too small. Note that this C function can be called only from code in the common area. The function is accessed as follows:

extern void switchbank (unsigned char bank_number);

:

:

switchbank (0);

Configuration Examples

The following figure illustrates the memory map for this example.

FFFFH

0000H

One 256KB EPROM is used in this hardware configuration. The bank switching can be implemented by using two bank select address lines (in this example

9 Port 1.5 and Port 3.3). L51_BANK.A51 can be configured as follows for this hardware configuration.

The section that starts with IF ?B_MODE = 4 defines the code that switches between the code banks. This section needs to be configured as follows:

You need to ensure that the CPU starts in a defined state at reset. Therefore the following code needs to be added to the STARTUP.A51 file of your application:

The Lx51 linker/locator automatically places copies of the code and data in the common area into each bank so that the contents of all EPROM banks are identical in the address range of the common area. The BANKAREA control is not required since the default setting already defines address range 0 to 0xFFFF as banked area.

302 Chapter 9. Linker/Locator

EPROM.

The following figure illustrates the memory map for this example.

You need no additional configuration in the STARTUP.A51 file. The Lx51 linker/locator automatically places copies of the code and data in the common

area into each bank so that the contents of all EPROM banks are identical in the address range of the common area. The BANKAREA control is not required

since the default setting already defines address range 0 to 0xFFFF as banked 9 area.

Banking With Common Area

The following schematic shows a hardware that offers a 32KB common area and seven 32KB code banks. A single EPROM is used to map the complete memory. Due to the address decoding logic, the code bank 0 is identical with the common area and should be therefore not used by your application. The design also provides 256KB xdata memory that is mapped the same way as the code memory. The xdata space might be used for variable banking.

The following figure illustrates the memory map for this example.