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Overlaying Data Memory
The stack addressing of the x51 CPU is slower compared to accessing fixed, |
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absolute memory locations. For this reason, local variables and function |
arguments of C and PL/M-51 routines are stored at fixed memory locations rather than on the stack. By using techniques to overlay the parameters and local variables of C and PL/M-51 functions, the linker/locator attempts to maximize the amount of available space.
NOTE
The Cx51 compiler supports also reentrant functions where the parameters and automatic variables are store on the CPU stack of a simulate stack. For detailed information refer to the Cx51 User’s Guides.
To accomplish overlaying, the linker/locator analyzes all references or calls between the various functions. Using this information, the linker/locator can determine precisely which data and bit segments can be overlaid.
You may use the OVERLAY and NOOVERLAY control to enable or disable data overlaying. The OVERLAY control is the default and allows for very compact data areas. Use the NOOVERLAY control to disable the segment overlay function.
Resolving External References
External symbols reference addresses in other modules. A declared external symbol must be resolved with a public symbol of the same name. Therefore, for each external symbol, a public symbol must exist in another module.
The linker/locator builds a table of all public and external symbols that it encounters. External references are resolved with public references as long as the names match and the symbol attributes correspond.
The linker/locator reports an error if the symbol types of an external and public symbol do not correspond. The linker/locator also reports an error if no public symbol is found for an external reference.
The absolute addresses of the public symbols are resolved after the location of the segments is determined.
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Generating a Listing File
The linker/locator generates a listing file that lists information about each step in |
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the link and locate process. This file also contains information about the |
symbols and segments involved in the linkage. In addition, the following information may be found in the listing file:
The filenames and other parameters specified on the command line.
Filenames and module names of all processed modules.
A memory allocation table, which contains the location of the segments, the segment type, the location method, and the segment name. This table may be suppressed by specifying the NOMAP control.
The overlay map which shows the structure of the finished program and lists address information for the local data and bit segments of a function. The overlay map also lists all code segments for which OVERLAYABLE segments exist. You may suppress the overlay map by specifying the NOMAP control.
LX51 and L251 provide a list of all PUBLIC symbols within a program.
A list of all errors in segments and symbols. The error causes are listed at the end of the listing file.
A list of all unresolved external symbols. An external symbol is unresolved if no corresponding public symbol exists in another input file. Each reference to an unresolved external symbol is listed in an error message at the end of the listing file.
A symbol table, which contains the symbol information from the input files. This information consists of the names of the MODULES, SYMBOLS, PUBLICS, and LINES. You may selectively suppress the symbolic information with linker controls.
An alphabetically sorted cross reference report of all PUBLIC and EXTERN symbols in which the memory type and the module names that contain a reference to that symbol are displayed.
Errors detected during the execution of the linker/locator are displayed on the screen as well as at the end of the listing file. Refer to “Error Messages” on page 360 for a summary of the linker/locator errors and causes.
264 Chapter 9. Linker/Locator
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Bank Switching |
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The classic 8051 directly supports a maximum of 64 KBytes of code space. The |
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Lx51 linker/locator allows 8051 programs to be created that are larger than 64 |
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KBytes by using a technique known as code banking or bank switching. Bank |
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switching involves using extra hardware to select one of a number of code banks |
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all of which will reside at a common physical address. |
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For example, your hardware design may include a ROM mapped from address |
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0000h to 7FFFh (known as the common area) and four 32K ROM blocks |
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mapped from code address 8000h to 0FFFFh (known as the code bank area). |
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The following figure shows the memory structure. |
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FFFFh |
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ROM |
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Bank #0 |
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Bank #1 |
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Bank #2 |
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Bank #3 |
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32 KB |
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32 KB |
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32 KB |
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32 KB |
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8000h |
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7FFFh
ROM
Common
Area
32 KB
0000h
The code banking facility of Lx51 is compatible with the C51 compiler, the CX51 compiler, and the Intel PL/M-51 compiler. Modules written using on of these compilers can be easily used in code banking applications. No modifications to the original source files are required.
Refer to “Bank Switching” on page 293 for detailed information about memory banking and instructions for building code banking programs.