Fundamentals of Microelectronics

In analogy with the standard emitter follower (Chapter 5), we can view this result as voltage division between two resistances of values [( 2 + 1)gm3 + 1=r 3],1 and RL [Fig. 13.20(d)]. That is, the output resistance of the circuit (excluding RL) is given by

because 1=r 3 = gm3= 3 ( 2 + 1)gm3. If Q3 alone operated as a follower, the output impedance would be quite higher (1=gm3).

The results expressed by (13.30) and (13.32) are quite interesting. The voltage gain of the circuit can approach unity if the output resistance of the Q2-Q3 combination, [( 2 + 1)gm3],1, is much less than RL. In other words, the circuit acts as an emitter follower but with an output impedance that is lower by a factor of 2 + 1.

Example 13.11

Compute the input impedance of the circuit shown in Fig. 13.20(c).

Solution

Since the current drawn from the input is equal to (vin , vout)=r 3, we have from (13.30)

Exercise

Calculate the output impedance if rO3 < 1.

The circuit of Fig. 13.20(b) proves superior to a single pnp emitter follower. However, it also introduces an additional pole at the base of Q2. Also, since Q3 carries a small current, it may not be able to charge and discharge the large capacitance at this node. To alleviate these issues, a constant current source is typically added as shown in Fig. 13.21 so as to raise the bias current

Vin

Q 3 Q 2

I 1

VEE

Figure 13.21 Addition of current source to improve speed of composite device.

of Q3.

Example 13.12

Compare the two circuits depicted in Fig. 13.22 in terms of the minimum allowable input voltage

Figure 13.22 Voltage headroom for (a) simple follower, (b) composite device.

and the minimum achievable output voltage. (Bias components are not shown.) Assume the transistors do not enter saturation.

Sec. 13.6 Short-Circuit Protection 703

Solution

In the emitter follower of Fig. 13.22(a), Vin can be as low as zero such that Q2 operates at the edge of saturation. The minimum achievable output level is thus equal to jVBE2j 0:8 V.

In the topology of Fig. 13.22(b), Vin can be equal to the collector voltage of Q3, which is equal to VBE2 with respect to ground. The output is then given by Vin + jVBE3j = VBE2 + jVBE3j 1:6 V, a disadvantage of this topology. We say the circuit “wastes” one VBE in voltage headroom.

Exercise

Explain why Q2 cannot enter saturation in this circuit.

13.5.3 High-Fidelity Design

Even with the diode branch present in Fig. 13.15(b), the output stage introduces some distortion in the signal. Specifically, since the collector currents of Q1 and Q2 vary considerably in each half cycle, so does their transconductance. As a result, the voltage division relationship governing the emitter follower, Eq. (13.20), exhibits an input dependent behavior: as Vout becomes more positive, gm1 rises (why?) and Av comes closer to unity. Thus, the circuit experiences nonlinearity.

In most applications, especially in audio systems, the distortion produced by the push-pull stage proves objectionable. For this reason, the circuit is typically embedded in a negative feedback loop to reduce the nonlinearity. Figure 13.23 illustrates a conceptual realization, where

VCC

Vb1 Q 3

Q 1

D1

Vout

D2

RL

Q 2

Vin

A1 Q 4

VEE

Figure 13.23 Reduction of distortion by feedback.

amplifier A1, the output stage, and resistors R1 and R2 form a noninverting amplifier (Chapter 8), yielding Vout (1 + R1=R2)Vin and significantly lowering the distortion. However, owing to the multiple poles contributed by A1 and the push-pull stage, this topology may become unstable, necessitating frequency compensation (Chapter 12).

13.6 Short-Circuit Protection

Electronic devices and circuits may experience “hostile” conditions during handling, assembly, and usage. For example, a person attempting to connect a speaker to a stereo may accidentally

704 Chap. 13 Output Stages and Power Amplifiers

short the amplifier output to ground while the stereo is on. The high currents flowing through the circuit under this condition may permanently damage the output transistors. Thus, a means of limiting the short-circuit current is necessary.

The principle behind short-circuit protection is to sense the output current (by a small series resistor) and reduce the base drive of the output transistors if this current exceeds a certain level. Shown in Fig. 13.24 is an example, where QS senses the voltage drop across r, “stealing” some

of the base current of Q1 as Vr approaches 0.7 V. For example, if r = 0:25 , then the emitter current of Q1 is limited to about 2.8 A.

The protection scheme of Fig. 13.24 suffers from several drawbacks. First, resistor r directly raises the output impedance of the circuit. Second, the voltage drop across r under normal operating condition, e.g., 0.5-0.6 V, reduces the maximum output voltage swing. For example, if the base voltage of Q1 approaches VCC, then Vout = VCC , VBE1 , Vr VCC , 1:4 V.

13.7 Heat Dissipation

Since the output transistors in a power amplifier carry a finite current and sustain a finite voltage for part of the period, they consume power and hence heat up. If the junction temperature rises excessively, the transistor may be irreversibly damaged. Thus, the “power rating” (the maximum allowable power dissipation) of each transistor must be chosen properly in the design process.

13.7.1 Emitter Follower Power Rating

Let us first compute the power dissipated by Q1 in the simple emitter follower of Fig. 13.25, assuming that the circuit delivers a sinusoid of VP sin !t to a load resistance RL. Recall from

VEE

Figure 13.25 Circuit for calculation of follower power dissipation.

Section 13.2 that I1 VP =RL to ensure Vout can reach ,VP . The instantaneous power dissi-

pated by Q1 is given by IC VCE and its average value (over one period) equals:

where T = 1=!. Since IC IE = I1 + Vout=RL and VCE = VCC , Vout = VCC , VP sin !t, we have

To carry out the integration, we note that (1) the average value of sin !t over one period T is zero; (2) sin2 !t = (1 , cos 2!t)=2; and (3) the average value of cos 2!t over one period T is zero. Thus,

Note that the result applies to any type of transistor (why?). Interestingly, the power dissipated by Q1 reaches a maximum in the absence of signals, i.e., with VP = 0:

The value is, of course, positive because VEE < 0 to accommodate negative swings at the output.

Exercise

Explain why the power delivered by VEE is equal to that dissipated by I1.

13.7.2 Push-Pull Stage Power Rating

We now determine the power dissipated by the output transistors in the push-pull stage (Fig. 13.26). To simplify our calculations, we assume that each transistor carries a negligible cur-

6Here, VBE is neglected with respect to VP .

Example 13.14

A student observes from (13.47) that Pav = 0 if VP = 4VCC = , concluding that this choice of peak swing is the best because it minimizes the power “wasted” by the transistor. Explain the flaw in the student's reasoning.

Solution

With a supply voltage of VCC, the circuit cannot deliver a peak swing of 4VCC = (> VCC). It is thus impossible to approach Pav = 0.

Exercise

Compare the power dissipated in Q1 with that delivered to RL for VP = 2VCC= .

The problem of heat dissipation becomes critical for power levels greater than a few hundred milliwatts. The physical size of transistors is quite small, e.g., 1 mm 1 mm 0:5 mm, and so is the surface area through which the heat can exit. Of course, from the perspective of device capacitances and cost, the transistor(s) must not be enlarged just for the purpose of heat dissipation. It is therefore desirable to employ other means that increase the conduction of the heat. Called a “heat sink” and shown in Fig. 13.27, one such means is formed as a metal structure (typically aluminum) with a large surface area and attached to the transistor or chip package. The idea is to “sink” the heat from the package and subsequently dissipate it through a much larger surface

Heat

Dissipation

Package

Figure 13.27 Example of heat sink.

area.

13.7.3 Thermal Runaway

As described above, the output transistors in a power amplifier experience elevated temperatures. Even in the presence of a good heat sink, the push-pull stage is susceptible to a phenomenon called “thermal runaway,” which can damage the devices.

To understand this effect, let us consider the conceptual stage depicted in Fig. 13.28(a), where the battery VB 2VBE eliminates the dead zone and Vout = 0. What happens as the junction temperature of Q1 and Q2 rises? It can be proved that, for a given base-emitter voltage, the collector current increases with temperature. Thus, with a constant VB, Q1 and Q2 carry increasingly larger currents, dissipating greater power. The higher dissipation in turn further raises the junction temperature and hence the collector currents, etc. The resulting positive feedback continues until the transistors are damaged.

Interestingly, the use of diode biasing [Fig. 13.28(b)] can prohibit thermal runaway. If the diodes experience the same temperature change as the output transistors, then VD1 + VD2 decreases as the temperature rises (because their bias current is relatively constant), thereby stabilizing the collector currents of Q1 and Q2. From another perspective, since D1 and Q1 form a

Figure 13.28 (a) Runaway in the presence of constant voltage shift, VB, (b) use of diodes to avoid runaway.

current mirror, IC1 is a constant multiple of I1 if D1 and Q1 remain at the same temperature. More accurately, we have for D1 and D2:

Equating (13.50) and (13.52) and assuming the same value of VT (i.e., the same temperature) for both expressions, we write

13.8 Efficiency

Since power amplifiers draw large amounts of power from the supply voltage, their “efficiency” proves critical in most applications. In a cellphone, for example, a PA delivering 1 W to the antenna may pull several watts from the battery, a value comparable to the power dissipation of the rest of the circuits in the phone.

The “power conversion efficiency” of a PA, , is defined as

Thus, an efficiency of 30% in the above cellphone translates to a power drain of 3.33 W from the battery.

It is instructive to compute the efficiency of the two output stages studied in this chapter. The procedure consists of three steps: (1) calculate the power delivered to the load, Pout; (2) calculate the power dissipated in the circuit components (e.g., the output transistors), Pckt; (3) determine

= Pout=(Pout + Pckt).

13.8.1 Efficiency of Emitter Follower

With the results obtained in Section 13.7.1, the efficiency of emitter followers can be readily calculated. Recall that the power dissipated by Q1 is equal to

That is, the efficiency reaches a maximum of 25% as VP approaches VCC.7 Note that this result holds only if I1 = VP =RL.

Example 13.15

An emitter follower designed to deliver a peak swing of VP operates with an output swing of VP =2. Determine the efficiency of the circuit.

Solution

Since the circuit is originally designed for an output swing of VP , we have VCC = ,VEE VP and I1 = VP =RL. Replacing VP with VCC=2 and I1 with VCC =RL in (13.59), we have

7This is only an approximation because VCE or the voltage across I1 cannot go to zero.

This low efficiency results because both the supply voltages and I1 are “overdesigned.”

Exercise

At what peak swing does the efficiency reach 20%?

The maximum efficiency of 25% proves inadequate in many applications. For example, a stereo amplifier delivering 50 W to a speaker would consume 150 W in the output stage, necessitating very large (and expensive) heat sinks.

13.8.2 Efficiency of Push-Pull Stage

In Section 13.7.2, we determined that each of Q1 and Q2 in Fig. 13.26 consumes a power of

The efficiency thus reaches a maximum of =4 = 78:5% for VP VCC, a much more attractive result than that of the emitter follower. For this reason, push-pull stages are very common in many applications, e.g., audio amplifiers.

Example 13.16

Calculate the efficiency of the stage depicted in Fig. 13.26. Assume I1(= I2) is chosen so as to allow a peak swing of VP at the output. Also, VCC = ,VEE.

Solution

Recall from Section 13.3 that I1 must be at least equal to (VP =RL)= . Thus, the branch consisting of I1, D1; D2, and I2 consumes a power of 2VCC(VP =RL)= , yielding an overall efficiency of:

We should note the approximation made here: with the diode branch present, we can no longer assume that each output transistor is on for only half of the cycle. That is, Q1 and Q2 consume slightly greater power, leading to a lower .