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Unit 5 Функции слова that

  1. Если после that в начале предложения стоит явное сказуемое, то that – подлежащее и переводится как 'это'.

That may be due to a decrease in ... That gives good results.

  1. Если после that в начале предложения стоит слово без определителей, то такое that – указательное местоимение 'тот', 'та'.

That town ... That paper presents ...

  1. Если после that в начале предложения стоит слово с определителем, то that союз, вводящий придаточное предложение, 'то, что'.

That such a relationship exists is ...

  1. Если перед that явное сказуемое, а после that – слово с определителем, то that – союз, вводящий придаточное дополнительное предложение и переводится 'что'.

... knows that a plan... ...can be shown that, the most ...

  1. Заменитель ранее упомянутого существительного. В таком случае за ним обычно стоит предлог (чаще всего of) или причастие в функции определения.

The reaction is similar to that observed by us. Эта реакция аналогична реакции, которую мы наблюдали.

  1. Относительное местоимение 'который, которая, которые'.

The girl that is wading the time-table is our student.

Следует запомнить наиболее распространенные сочетания с that.

that is (i.e.) то есть

that is why вот почему

that is to say то есть; следовательно;

таким образом

I. Переведите следующие предложения

  1. The fact is that our era began with the discovery of the electric current.

  2. The mixture is identical with that mentioned above.

  3. We know that there exist different types of amplifiers,

  4. One should remember that operating point will move because of chauges in temperature or power supply levels.

  5. That more amplification is obtained when amplifiers are connected in tandem is well known to every specialist.

  6. The question which it is necessary to clarify is that all components of the output signal are delayed by the same amount.

  7. The disadvantage of the given circuit was that output resistance was higher than input resistance in the ammeter.

  8. The potentials of carbon and nitrogen increase over that of boron owing to the greater nuclear charges.

  9. Energy that is produced by hydroelectric stations is used for industry, agriculture and other needs of our national economy.

  10. That age brought with it a revolution in old technical values.

II. Переведите предложения на русский язык, обращая, внимание на выделенные слова.

law закон; правило

low низкий; слабый

charge заряд; заряжать

change изменение; изменять

single единственный

signal сигнал

since с; с тех пор, как

science наука; предмет

  1. The latter law is statistical in the above-mentioned sense.

  2. Let us discuss the three lowest members of a spectrum of languages: machine language, mnemonic machine language, and assembly language.

  3. The semiconductor material is used to fabricate component parts within a single piece of semiconductor.

  4. The signal to be amplified is introduced into the emitter circuit and the amplified signal appears in the collector circuit.

  5. Static charges are known to be at rest.

  6. Alternating current changes its direction many times a second.

  7. The physical properties of plasma have been a problem since the discovery of that state of matter.

  8. Science fiction stories sometimes give rise to questions as to whether a conflict is possible between men and machines.

  9. Computer science is not like the natural sciences. In the natural sciences one is investigating, explaining and exploiting what is there in the world.

  10. Since the Japanese Ministry of Labour started counting casualties in 1978, ten Japanese factory workers have died at the hands of robots.

III. Определите принадлежность слов к частям речи. Слова переведите.

fulfil – overfulfil – fulfilment – overfulfilment

perform – performance – performer

replace – replacement – replaceable – irreplaceable

sufficient – insufficient – sufficiently

investigate – investigation – investigator

discover – discoverer – discovery

amplify – amplifier – amplification

resistance – resist – resistant – resistivity

insulator – insulate – insulation

reduce – reduction

design – designer – designing

process – processor – processing

integrate – integration – integrator

employ – employment – unemployment

program – programmer – programming – programmable – programmability

execute – execution – executive – executor

differ – difference – different. – differentiate – differential

depend – dependence – dependent – independence – independent

act – action – activity – active – activate

sequence – sequential – sequentially

maintain – maintenance – maintainability

I. Прочитайте текст u выполните к нему задание, данное в конце текста

The need for the development of 'Fifth generation computers' is illustrated by peculiar effect of the tumbling cost of large-integrated circuits. The very cheapness of the hardware means that we are using compute to solve bigger and more difficult, problems and this results in an escalating cost in the writing of the programs. The situation has been referred to as the 'software crisis'.

The principal reason for this software crisis is that the internal structure of the computer allows it to operate on one piece of data at a time, using only one instruction at a time – the von Neumann architecture. The next step is to allow the computer to operate by overlapping the various stages that make up the execution of an instruction, so that a number of consecutive instructions are simultaneously active in various stages of partial execution. This is called 'pipelining', first used in Manchester University and is employed in large, fast computers such as Cray 1. From a programmer's point of view there is little difference – it just runs faster.

An 'array processor' uses an array of similar processing elements but still has a single stream of instructions emanating from a central point. Each instruction is simultaneously carried out by all the processing elements in the array. Finally in this catalogue of existing computer architecture; we come to the multi-processor multi-instruction machine. The CYBA-M computer, built at UMIST has a number of independent processors arranged

around a common memory. Each processor has its own task to perform and is coordinated with the others through the shared memory. The shared memory when built normally can cause a bottleneck as it can only be accessed by one processor at a time. This may be overcome by having a number of separate memory elements, connected to the processors through a switching network.

This brings us to the Dataflow computer, the next, 5th generation. The basic plan for a Dataflow machine is that there are two main components: a block of processing units and an activity store (where the program is kept). They are interlinked by a high bandwidth communications path in the form of a ring. At any given time the processing units will be performing a number of tasks, each of which might be quite simple such as multiplication. A packet of data complete with its instruction arrives at the processor from the activity store. The processed result is transmitted back to the activity store and its arrival there triggers the release of further tasks to be transmitted to the processing units. Many of the tasks may be performed independently and, therefore, asynchronously, the only time that operations need to be sequential is when one operation depends on the results of another. A program consists of a very large number of small tasks, coordinated only through their data dependencies.

As all the existing program languages are based on von Neumann architecture, completely new programs need to be developed. One such is KRC, The Kent Recursive Calculator, developed at the University of Kent. An interesting distinction is that once a value is assigned to a variable (i.e. X = A + В), this cannot be altered as there is no sequential order. So an arrangement such as X + X = 1 is not valid. The left-hand side of each assignment equation must be unique. In KRC there is a Sort operation and if we want to sort the elements of list X we could write Y = SORT X. Y is the name for the new sorted list while X remains unaltered. All data structures are built using lists including such elements as 'infinite lists', for example, (1, 3...), the list of all odd numbers. Many such lists constitute mathematical sets so elements of the language can be built by obeying the rules of set theory.

Notes:

to overlap перекрывать; совмещать

consecutive последовательный

simultaneous одновременный

pipelining конвейерная обработка

array processor матричный процессор

to emanate исходить; истекать

shared memory совместно используемая память

bottleneck недостаток

to interlink тесно связывать

bandwidth полоса, диапазон

a ring кольцо

to transmit передавать

a release выпуск, освобождение

to assign назначать; присваивать

to alter изменять

infinite list бесконечный список

odd нечетный; добавочный

to obey подчиняться

a set множество

partial индивидуальный

IV. Ответьте на вопросы.

  1. What features characterize the von Neumann architecture?

  2. What is your opinion on the 5th generation com outers?

  3. What is the principle of pipelining?

  4. What is the bottleneck of the 5th generation computer?

2. Прочитайте и переведите следующий текст. На основе текста составьте рассказ о миникомпьютерах.

Minicomputers emerged in the 1960s as cost effective machines that offered limited functionality at significantly lower cost than for larger computers. Since then, advances in technology have contributed to the increasing functionality of minis. Instruction sets have been enhanced to include operations on floating point numbers for scientific processing and on character strings for commercial applications. The availability of low cost semiconductor memory allowed large memories to be attached to small machines at reasonable cost. In fact, semiconductor technology has been the driving force for improvements in minicomputer systems; while technology does not provide new ideas, it does present the basis for their cost effective implementation.

Further, the trend toward distributed and decentralized processing has created a market for large scale functionality at minicomputer costs. To meet that demand, minicomputer operating systems have evolved from simple monitors to powerful executives capable of supporting multiple environments simultaneously. Often a single minicomputer must perform a mixture of batch, real-time, interactive, and program development tasks using multiple languages.

This increased function, in terms of computing speeds and larger memories and operating system capabilities, has further expanded the scope of applications for minicomputers. Today, distributed minis are often viewed as viable alternatives to large centralized mainframes. For many of these new applications, a minicomputer's 64KB or 128KB virtual address space is not and will not be a severe limitation. For others, especially where the minis are doing jobs originally assigned to maxis, the small machines require the ability to store and execute large programs without resorting to overlaying techniques.

Virtual addresses are the addresses a program generates to fetch instructions and data. The maximum range of these addresses is called the virtual address space. On 16-bit minis, this space is usually 64KB (64 KB being the largest address representable in 16 bits) or 128KB (if separate address spaces are used for instructions and data as on the PDP-11/70). The addresses that the GPU uses to actually address the memory are called the physical addresses and the total amount of memory that can be put on the system is called the physical address space which is often several million bytes.

The size of the virtual address is deeply ingrained in the machine language of a computer. For example, when computing the location of an element within an array, the program must know how large the addresses are so that it can use the appropriate instructions to fetch and operate on them. Therefore, when changing the size of virtual addresses, all assembly language programs must be modified. All higher level language programs, such as those written in FORTRAN or COBOL, must be recompiled with a compiler that generates addresses and code for the new size. Since it is not possible to extend the virtual address size and allow old programs to take advantage of the extension without changing them, the VAX-11 architecture become a new architecture.

Notes:

floating point плавающая точка

a string строка; цепочка

executive управляющая программа

environment среда; условия

distributed processing распределенная обработка

a mainframe универсальная выч. машина

a space область; пространство; пробел

an array матрица, массив

3. Прочитайте следующий текст, руководствуясь рисунком. Из текста выпишите английские эквиваленты, соответствующие русским, что даны на рисунке. Опираясь на Fig. 6, расскажите о VAX-11/780.

The VAX-11/780

The VAX-11/780 computer system, the first to use the new architecture, consists of the central processing unit, main memory subsystem, I/O subsystem, and console subsystem. The CPU, memory and I/O subsystems are connected through a high speed bus called the Synchronous Backplane Interconnect (SBI), which is the primary control and data transfer path. Currently, up to two memory controllers with a total of К MM of memory can be connected to it, but the SBI is capable of addressing up to 512MB. The UNIBUS adapter (UBA) provides a standard 1.5MB/sec UNIBUS for the attachment of a wide variety of peripherals. Up to four MASSBUS adapters (MBA) are used for disc and tape block transfers to 2MB/sec. Thus, the VAX-11/780 uses existing PDP-11 peripherals.

The SBI has a 32-bit data path and operates at a cycle time of 200nsec. Its protocol permits a 32-bit transfer using one address cycle and one data transfer cycle and two data transfer cycles. The maximum data rate achievable is 13.3MB/sec. To enhance its reliability, substantial protocol checking occurs on every cycle. In addition, maintainability is aided by the recording of the history of the last 16 SBI cycles by the CPU.

As might be expected, the CPU itself uses microprogramming to implement the instruction set, including floating-point, character string, decimal string, and compatibility mode instructions. A 12KB writable diagnostic control store (WDCS) is standard and can be loaded from the console subsystem. Further, floating-point performance can be enhanced with the optional Floating – Point Accelerator (FPA). A 12KB user writable control store is also available.

Консольная

подсистема

Центральный

процессор

Подсистема

памяти

Подсистема

ввода-вывода

Fig. 6. Architecture of VAX-11/780.

Internal data paths are 32 bits wide and standard Schottky-TTL logic circuits are used. Emitter coupled logic circuits and custom LSI have been used in selected places to optimize system performance and reliability.

The GPU employs cache buffers extensively to achieve high performance. For example, an 8KB cache provides fast access to frequently used data and reduces traffic on the SBI. A 128-entry address translation buffer acts as a cache for recent virtual to physical address translations. An 8-byte instruction buffer enables the CPU to fetch and decode the next instruction while the current one completes execution. The CPU-SBI interface includes a write buffer. Thus, when the CPU performs a write to memory, it need not wait for memory to accept the data. It writes into the buffer, initiates a memory transfer, and continues execution.

The main memory subsystem consists of error-correcting M.OS memory using Hamming codes. Single-bit errors are corrected automatically to improve the mean time between failure by a factor of 10 over memory systems without error correction. All 2-bit errors and most involving more bits are detected. All corrected and uncorrected errors are reported to the operating system for appropriate logging and corrective action.

The VAX-11/780 is capable of operating despite faulty memory locations. The memory management scheme allows the operating system to map around failed memory locations, thus significantly improving system availability. Two memory controllers can be connected to a VAX-1 1/780 system, each handling up to 4MB. Interleaving is possible if the two controllers manage equal amounts of memory.

Memory is organized in 64-bit quad words using 4Kbit or 16Kbit MOS RAM's. Memory controllers have buffers that hold up to four memory requests. And optional battery backup is available to protect memory contents over short-term power failures.

The console subsystem consists of an LSI-11 microcomputer with 16KB of RAM, 8KB of ROM, a floppy disc, a console terminal interface, and a port for remote diagnostics. The floppy is used both as a load device for system installation as well as a medium for the distribution of software updates. We believe this intelligent console is unique among minicomputer systems.

Notes

attachment присоединение

maintainability удобство эксплуатации

history предыстория; архив

compatibility совместимость

emitter coupled logic circuits эмиттерно-связные

логические схемы

traffic интенсивность потока; трафик

logging регистрация; запись

faulty неисправный; дефектный

medium носитель информации

battery backup батарейная поддержка

to map распределять

interleaving чередование

failure сбой